Stress insensitive integrated circuit

Details Stress insensitive integrated circuit Stress insensitive integrated circuit

1978-08-15

1986-07-08

Larkins, William D.

357 45, 357 26, H01L 2704

Patent

active

045996342

ABSTRACT:
An integrated circuit includes a plurality of circuit elements interconnected to operate as a circuit and formed in a common semiconductor substrate. The substrate is mounted on a supporting package, resulting in a mechanical stress in the substrate which is symmetrical about at least one given axis. At least the circuit elements with operating characteristics which are altered by the mechanical stress and which have a critical matching or ratio relationship are arranged symmetrically about the stress axis of symmetry. In a preferred form, the integrated circuit is a linear circuit, such as an operational amplifier employing junction field effect transistors (JFETs) for its input stage and bipolar transistors for its amplifier stage. Providing device symmetry about an axis of mechanical stress symmetry enables shifts in input offset voltage for such operational amplifiers to be reduced up to a factor of about 10.

REFERENCES:
patent: 3477031 (1969-11-01), Nagata
patent: 3714527 (1973-01-01), Schmidt
patent: 3729660 (1973-04-01), Maidique
patent: 3823354 (1974-07-01), Janssen
patent: 3863331 (1975-02-01), Schade, Jr.
patent: 3995304 (1976-11-01), Pease
patent: 4025941 (1977-05-01), Kanda et al.
Fukahori et al., IEEE J. of Solid State Circuits, vol. SC 11, No. 6, Dec. 1976, pp. 834-846.
Brokaw et al., IEEE J. of Solid-State Circuits, vol. SC-10, No. 6, Dec. 1975, pp. 421-422.

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