Stress free dielectric isolation technology

Details Stress free dielectric isolation technology Stress free dielectric isolation technology

1985-04-12

1986-08-19

Smith, John D.

Coating processes

Electrical product produced

Condenser or capacitor

29576W, 29580, 427 86, H01L 2176

Patent

active

046069364

ABSTRACT:
Stress is eliminated between a dielectrically passivated silicon wafer and a thick polycrystalline silicon layer by depositing a low melting transition layer such as a doped silica glass over the passivated silicon wafer.

REFERENCES:
patent: 4079506 (1978-03-01), Suzuki
patent: 4191603 (1980-03-01), Garbarino
patent: 4251571 (1981-02-01), Garbarino
patent: 4279671 (1981-07-01), Komatsu
patent: 4310965 (1982-01-01), Horiuchi
Suzuki et al., "Deformation in Dielectric-Isolated Substrates and its Control by a Multilayer Polysilicon Support Structure" J. Electrochem. Soc.: Solid-State Science and Technology, vol. 127, No. 7, Jul. 1980, pp. 1537-1542.
Kern et al., "Advances in Deposition Processes for Passivation Films" J. Vac. Sci. Technol., vol. 14, No. 5, Sep./Oct. 1977, pp. 1032-1062.
Davidson et al., "Dielectric Isolated Integrated Circuit Substrate Processes" Proceedings of the IEEE, vol. 57, No. 9, Sep. 1969, pp. 1532-1539.

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