Strained-silicon-on-insulator single-and double-gate MOSFET...

Active solid-state devices (e.g. – transistors – solid-state diode – Thin active physical layer which is – Heterojunction

Reexamination Certificate

Rate now

  [ 0.00 ] – not rated yet Voters 0   Comments 0


C257S288000, C257S365000, C257SE21125, C257SE21193

Reexamination Certificate



A method of forming a semiconductor structure (and the resulting structure), includes straining a free-standing semiconductor, and fixing the strained, free-standing semiconductor to a substrate.

patent: 4685198 (1987-08-01), Nomura et al.
patent: 4744863 (1988-05-01), Guckel et al.
patent: 5565690 (1996-10-01), Theodore et al.
patent: 6624478 (2003-09-01), Anderson et al.
patent: 6787423 (2004-09-01), Xiang
patent: 6867433 (2005-03-01), Yeo et al.
patent: 7074623 (2006-07-01), Lochtefeld et al.
patent: 2004/0104447 (2004-06-01), Lee et al.
patent: 1348210 (2002-05-01), None
patent: 2002-184962 (2002-06-01), None
patent: 530385 (2003-05-01), None
patent: WO 02/071495 (2002-09-01), None
Notification of Receipt of Demand By Competent International Preliminary Examining Authority dated Apr. 28, 2005, PCT/IPEA/402, PCT/IPEA/404.
Notification of Transmittal of the International Search Report and the Written Opinion of the International Searching Authority, or the Declaration, dated Mar. 11, 2005, PCT/ISA/220, PCT/ISA/210, PCT/ISA/237.
Notification Concerning Transmittal of International Application as Published or Republished dated Apr. 21, 2005, PCT/IB/311, WO 2004/114383 cover page.
P.M. Mooney, “Strain relaxation and dislocations in SiGe/Si structures”,Materials Science&Engineering Reports, vol. R17 No. 3, Nov. 1, 1996, pp. 105-146.
Jean-Pierre Colinge,Silicon-On-Insulator-Technology: Materials to VLSI, 2nd Edition, Kluwer Academic Publishers, 1997, Chapter 1 pp. 1-5, Chapter 4 pp. 105-107.
G.M. Cohen, et al., “Free standing silicon as a compliant substrate for SiGe”, Material Research Society 2003 Spring Meeting, Apr. 21-25, 2003.
A.M. Jones, et al., “Long-wavelength InGaAs quantum wells grown without strain-induced warping on InGaAs compliant membranes above a GaAs substrate”,Applied Physics Letters, vol. 74 No. 7, pp. 1000-1002, Feb. 15, 1999.
P.M. Solomon, et al., “Two Gates Are Better Than One-A planar self-aligned double-gate MOSFET technology to achieve the best on/off switching ratios as gate lengths shrink”,IEEE Circuits&Devices Magazine, vol. 19 No. 1, pp. 48-62, Jan. 2003.
Rim, et al., “Fabrication and Analysis of Deep Submicron Strained-Si N-MOSFET's”,IEEE Transactions On Electron Devices, vol. 47, No. 7, pp. 1406-1415, Jul. 2000.
H. Yin, et al., “Strain relaxation of SiGe islands on complaint oxide”,Journal of Applied Physics, vol. 91, No. 12, pp. 9716-9722, Jun. 15, 2002.
International Preliminary Report dated Sep. 14, 2006.


Say what you really think

Search for the USA inventors and patents. Rate them and share your experience with other people.


Strained-silicon-on-insulator single-and double-gate MOSFET... does not yet have a rating. At this time, there are no reviews or comments for this patent.

If you have personal experience with Strained-silicon-on-insulator single-and double-gate MOSFET..., we encourage you to share that experience with our community. Your opinion is very important and Strained-silicon-on-insulator single-and double-gate MOSFET... will most certainly appreciate the feedback.

Rate now


Profile ID: LFUS-PAI-O-4236151

All data on this website is collected from public sources. Our data reflects the most accurate information available at the time of publication.