Storing a digitized stream of interlaced video image data in a m

Computer graphics processing and selective visual display system – Display driving control circuitry – Physically integral with display elements

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348448, 348715, 345196, G09G 536

Patent

active

054063116

ABSTRACT:
Apparatus for storing interlaced video data in a split video memory in noninterlaced form in real video time and without wasted RAM space through the use of a video memory controller that controls transfers between a serial access memory (SAM) including a lower SAM (LSAM) and upper SAM (USAM) and a random access memory (RAM) including a lower RAM (LRAM) and an upper RAM (URAM) of the video memory during free time between video lines when pixel data are not being received, the video memory controller transmitting transfer control signals to the video memory to cause data stored in the LSAM and USAM to be written to the proper page location in the LRAM and URAM after a line has been written in order to save the data before receiving the next line, the controller also generating transfer control signals to cause data in the LRAM and URAM to be read back into the LSAM and the USAM before receiving new data in order to save data that may have already been written into the same page (e.g., from a prior field) at locations adjacent to those for the line being written, the video memory controller also generating a tap control signal causing the next line of digitized data to be stored in the SAM at a location spaced from the location of the most recently stored data to provide space necessary for storage of data of a video line.

REFERENCES:
patent: 4660070 (1993-05-01), Nishi et al.
patent: 4698674 (1987-10-01), Bloom
patent: 5319603 (1994-06-01), Watanabe
Product Literature for Mitsubishi Electric Part No. M5M442256AJ, AL-7, -8, -10.

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