Stored-program control machine

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364900, G06F 922

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active

043995160

ABSTRACT:
A hierarchical organization of programmable logic arrays permits the control of microprocessor functions to be achieved in a way which allows otherwise wasted clock time to be used. The mostly independent operations of the several PLA's is organized by "handshake" signals from the latches of one PLA to those of another via AND circuits operative to selectively enable clock signals, in some instances, and data in other instances, to be applied to the latches. The use of the AND circuits enables requisite operations to be achieved with relatively small PLA's.

REFERENCES:
patent: 3959774 (1976-05-01), Mead
patent: 3983538 (1976-09-01), Jones
patent: 4034356 (1977-07-01), Howley
patent: 4037089 (1977-07-01), Horninger
patent: 4237542 (1980-12-01), Cukier
patent: 4268908 (1981-05-01), Logue et al.
Elliott et al., "Array Logic Processing", IBM Tech. Disclosure Bulletin, vol. 16, No. 2, Jul. 1973, pp. 586-587.
Pilost et al., "Latched Inputs-An Improvement to PLA", IBM Tech. Disclosure Bulletin, vol. 20, No. 11A, Apr. 1978, pp. 4438-4439.
Mead et al., Introduction to VLSI Systems, Addison-Wesley, 1980, p. 81.

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