Coded data generation or conversion – Digital code to digital code converters – To or from run length limited codes
Reexamination Certificate
1997-10-24
2001-06-12
Wamsley, Patrick (Department: 2819)
Coded data generation or conversion
Digital code to digital code converters
To or from run length limited codes
C341S058000
Reexamination Certificate
active
06246346
ABSTRACT:
BACKGROUND OF THE INVENTION
1. Field of the Invention
In general, this invention relates to a storage system employing a high-rate code for a data channel that employs sampled-data processing. More particularly, it relates to a method and apparatus to implement such a high-rate code involving codewords that are subject to a constraint on run length between occurrences of an influential pattern.
2. Description of the Prior Art
A channel is a major functional element of a storage system such as a hard disk drive. The channel includes a write channel and a compatible read channel. The write channel receives input data, typically as a block of data including 512 user-data bytes plus various appended ECC and EDC bytes, and responsive to the input data generates a serial signal defining write data. An important function of the channel is encoding and decoding (sometimes referred to as the “ENDEC” function). The write channel performs encoding to define a form of serial signal that, with reasonable reliability, can be recorded and be recovered in the course of the performance of decoding by the read channel. Code rate is a very significant measure of the relative value of a particular code defined by the ENDEC function. A relatively low code rate causes inefficient use of available areal bit density, which in turn generally means a relatively high cost per megabyte of storage capacity. On the other hand, a relatively high code rate contributes to more efficient use of available areal bit density, which in turn generally means a relatively lower cost per megabyte of storage capacity. In general, code rate has a value equal to the ratio of: (a) the number of bits in a data block, to (b) the number of bits in a codeword corresponding to the data block.
In a hard disk drive, the read channel receives an analog read signal from a transducer during a read operation. The analog read signal is characterized by a “channel frequency.” As used in this art, “channel frequency” is the reciprocal of a time period “T,” where the “T” is the time period consumed while an elemental-length magnet passes under the transducer during a read operation with the disk spinning at a constant angular velocity. In this regard, the length of each magnet recorded along a track as a result of a write operation is, to a first order of approximation, either an elemental length or an integer multiple of the elemental length. Each elemental length magnet can be referred to as a “bit cell” that is defined during a write operation.
One category of signaling processes uses peak detection for recovering data from the analog read signal. Another category uses sampled-data techniques; this category includes partial response maximum likelihood (“PRML”) channels, EPR4 channels, and E
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PR4 channels.
In a hard disk drive employing a peak detecting channel, digital data are represented in the media by transitions between oppositely magnetized bit cells. Provided that the transitions between oppositely magnetized bit cells do not unduly interfere with each other, each such transition causes a peak in the analog read signal; and a peak-detecting channel employs a peak detector that detects such peaks, and produces digital signal in the form of a serial, binary-valued signal that is an error-prone signal for numerous reasons. One reason why the peak detector produces an error-prone signal is random noise; this source of error presents a problem for any type of channel. Another reason relates to interference between adjacent transitions. Interference between such transitions is referred to as intersymbol interference and adversely affects performance of a peak detecting channel increasingly as a function of channel rate.
A sampled-data channel employs sampling circuitry that samples the analog read signal to produce a sequence of samples. The samples so produced are provided in sequence to a detector such as a so-called “Viterbi detector” that internally produces symbols and maps the internally-produced symbols to binary-valued symbols. In a PRML channel, such internally-produced symbols are often referred to as: “−1”; “0”; and “+1”; and the binary-valued symbols are supplied to a deserializer to produce a parallel-by-bit digital signal.
Not too many years ago, a state of the art hard disk drive typically employed a peak detection read channel and a code selected from a category commonly referred to as “RLL” codes. “RLL” is an acronym for “run length limited.” Examples of such RLL codes include codes commonly referred to as “1,7” codes and “2,7” codes. The code rate for a “1,7” code is ⅔ and the code rate for a “2,7” code is ½. One characteristic of such codes for peak detection channels is that a rule for the code excluded the possibility of occurrence of certain adverse sequence of bits. In a peak detection channel, because it is subject to an adverse affect (intersymbol interference) if the analog read signal were ideally to define two adjacent peaks (which in a peak detection channel is interchangeably described as two adjacent 1's; i.e., a binary “1” followed immediately by another binary “1”), the encoding step ensures that no pattern of consecutive 1's can occur in the codeword-defining stream (i.e., the concatenated sequence of codewords). Another adverse sequence of bits involves an undue run length without any peaks, which herein is interchangeably described as a run length of all 0's. In a “2,7” code, there must be at least two zeros between successive occurrences of 1's, and the maximum run length of all 0's is seven. In a “1,7” code, there must be at least one zero between successive occurrences of 1's, and the maximum run length of all 0's is seven. A general form for characterizing such codes for peak detecting channels involves the following parameters: 1) “d”—the minimum number of zeros between the successive occurrences of 1's; and 2) “k”—the maximum run length of all 0's.
A contemporary state of the art hard disk drive typically employs a sampled-data channel. In a sampled-data channel, intersymbol interference does not cause the adverse effect it causes in a peak detecting channel. Typically, therefore, codes for a sampled-data channel allow code bit streams to include adjacent 1's. Certain other characteristics of such a sampled-data channel are such that it is advisable to limit the maximum run length of all 0's in two ways, one being a “Global” and the other being on an “Interleaved” basis. A general form for characterizing such codes for a sampled-data channel involves the following parameters: 1) “d”—the minimum number of zeros between the successive occurrences of 1's; 2) “G”—the maximum run length of all 0's; and 3) −“I” the maximum run length of all 0's on an interleaved basis.
For a sampled-data channel, the parameter d typically equals 0; the d constraint can be 0 because intersymbol interference does not adversely affect the sampled-data channel. However, because a long string of consecutive 0's on a global basis can adversely affect timing recovery in the sampled-data channel, the G constraint is imposed. Because a long string of 0's on an interleaved basis can adversely affect the detector in the sampled-data channel, the I constraint is imposed. An example of a patent describing the G/I constraint is U.S. Pat. No. 4,707,681, entitled “METHOD AND APPARATUS FOR IMPLEMENTING OPTIMUM PRML CODES” ('681 patent). The terms “k” and “k1” as used in the '681 patent correspond to the parameters “G” and “I.”
U.S. Pat. No. 5,422,760, entitled “DISK DRIVE METHOD USING ZONED DATA RECORDING AND PRML SAMPLING DATA DETECTION WITH DIGITAL ADAPTIVE EQUALIZATION” ('760 patent), provides background information on timing control circuits. At column 28, line 24, the '760 patent sets forth the general formula for determining a tracking mode timing error estimate.
U.S. Pat. No. 5,196,849, entitled “METHOD AND APPARATUS FOR IMPLEMENTING PRML CODES WITH MAXIMUM ONES” ('849 patent), relates ge
Cloke Robert Leslie
Lee Patrick James
McLaughlin Steven William
Shara Milad G.
Wamsley Patrick
Western Digital Corporation
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