Storage of input/output command timeout and acknowledge response

Details Storage of input/output command timeout and acknowledge response Storage of input/output command timeout and acknowledge response

1987-09-03

1989-10-03

Shaw, Gareth D.

Boots, shoes, and leggings

3642409, 3642679, 3642443, 3642456, G06F 1134, G06F 1342

Patent

active

048721107

ABSTRACT:
A data processing system includes a number of subsystems all coupled in common to a system bus and communicate with each other by sending and receiving commands sent over the system bus. A central processing subsystem includes a response memory for storing indication of the responses sent by the receiving subsystem when receiving commands sent by the central processing subsystem. The responses include an acknowledge response, a not acknowledge response or no response--a timeout. Storing the acknowledge response and the timeout will enable the programmer to determine which of the three responses was received.

REFERENCES:
patent: 4220990 (1980-09-01), Alles
patent: 4426679 (1984-01-01), Yu et al.
patent: 4475011 (1984-10-01), Brightman et al.
patent: 4562533 (1985-12-01), Hodel et al.
patent: 4733351 (1988-03-01), Peirent

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