Storage device having internal and external recording circuits

Dynamic magnetic information storage or retrieval – General processing of a digital signal – Pulse crowding correction

Reexamination Certificate

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Details

C360S046000, C360S051000

Reexamination Certificate

active

06301066

ABSTRACT:

FIELD OF THE INVENTION
The present invention relates to a disk device, and further to a hard disk device as an external storage device for a computer or the like.
BACKGROUND OF THE INVENTION
Conventionally a hard disk device has been used as an external storage device for a computer or the like. Capacity of a hard disk device has been becoming increasingly larger in association with improvement in performance of a computer and increase in a program size of software used therein. For this reason, also a recording density in a disk device has substantially increased, and also it is now strongly required to make higher a data transfer rate in data communications.
FIG. 10
is a block diagram showing configuration of a general magnetic disk device based on the conventional technology. In this magnetic disk device, there are provided such devices as a plurality sheets of disk
81
, a spindle motor (SPM)
82
for rotating the disk devices, a carriage
84
having a magnetic head
83
at its head, and a voice coil motor (VCM)
85
for rotating the carriage
84
. The disk
81
, spindle motor
82
, magnetic head
83
, carriage
84
, and voice coil motor
855
are accommodated in an enclosure comprising a base and a cover, and constitute a shielded head disk assembly (HDA)
80
(also called disk enclosure (DE).
Provided on a flexible printed circuit sheet connected to the carriage
84
or between the carriage
84
and a printed circuit board outside the disk assembly (HDA)
80
is a head IC
86
comprising a write amplifier and a preamplifier. The write amplifier switches a polarity of a recording current to be supplied to the magnetic head
83
according to write data. The preamplifier amplifiers a reproducing voltage (a read signal) detected by the magnetic head
83
. This head IC
86
is provided in the disk assembly (HDA)
80
.
In the magnetic disk device, a printed circuit board is attached to a bottom plate of an enclosure for the disk assembly (HDA)
80
from the outside. This printed circuit board is connected to the flexible printed circuit sheet inside the enclosure for the disk assembly (HDA)
80
via a connector. Provided on this external attached printed circuit board are a hard disk controller (HDC) circuit
70
, a buffer circuit
71
, a read channel circuit
72
, a servo demodulating circuit
73
, a VCM driving circuit
74
, an SPM driving circuit
75
, a digital signal processor (DSP) circuit
76
, and a microcontrol unit (MCU) circuit
77
.
The HDC circuit
70
controls an interface (not shown) for transaction of various commands or data with a CPU (central processing unit) in an upper apparatus such as a basic system of a computer. Also the HDC circuit
70
generates a control signal for controlling a format for regenerating record on a disk. The buffer circuit
71
temporally stores therein write data sent from the CPU
9
and read data read out from a disk.
The read channel circuit
72
comprises a modulating circuit for recording write data in a disk, a parallel-to-serial conversion circuit for converting parallel write data to serial data, a demodulating circuit for reproducing read data from the disk, a serial-to-parallel conversion circuit for converting serial read data to parallel data.
The servo demodulating circuit
73
demodulates a servo pattern for positioning recorded on a disk by means of peak holding or integration. The VCS driving circuit
74
has a power amplifier for allowing to flow a driving current to the voice coilmotor
85
. The SPM driving circuit
75
has a power amplifier for allowing a driving current to flow to the spindle motor
82
.
The DSP circuit
76
has a microprocessor for controlling a servo circuit for positioning the magnetic head
83
. And, the DSP circuit
76
recognizes a position signal outputted from the servo demodulating circuit according to a program stored in a memory, controls a driving circuit in the VCM driving circuit, and also controls rpm of a magnetic disk device under control by a driving current from the SPM driving circuit or the like.
The MCU circuit
77
provides controls over the HDC circuit
70
, DSP circuit
76
, and buffer circuit
71
according to a program stored in a memory.
In the disk device having the configuration as described above, write data is transferred from the read data channel
72
provided on a printed circuit board outside the enclosure via a flexible printed circuit sheet to a write amplifier in the head IC
86
. Rise and fall of the write data are recorded as they are in the disk.
For this reason, rise and fall of a write data pulse must be transferred from the read channel data
72
to the write amplifier rapidly and also accurately. For that purpose, write data is transferred as a differential and balanced type of serial data to a write amplifier.
There has been proposed an idea (Japanese Patent Laid-Open Publication No. HEI 9-55023) that a parallel-to-serial converter is provided just before the write amplifier, and write data is transferred as parallel data in a transfer path until it reaches the parallel-to-serial converter, by which the write data is converted to serial data to be supplied to the write amplifier. In this invention disclosed in Japanese Patent Laid-Open Publication No. HEI 9-55023, a write compensation circuit as a record-timing correcting circuit for correcting a timing for recording write data is provided just before the parallel-to-serial converter, and for this reason, the write compensation circuit is structured as a circuit for handling parallel data.
In a device having the configuration as shown in
FIG. 10
, however, a flexible printed circuit sheet used to transfer write data is long for the purpose to insure movability of the carriage
84
and also to transfer data to the outside of the enclosure. So, with a high write data transfer rate and a small pulse width as realized in the advanced technology developed in recent years, a pulse amplitude of write data becomes lower after it is transmitted from the read channel circuit
72
until it reaches a write amplifier. Because of the feature as described above, a data recording position (rising and falling positions of a write data pulse) in a disk may become inaccurate, which may in turn degrade a reproducing margin and lower reliability of data.
Also, in the invention disclosed in Japanese Patent Laid-Open Publication No. HEI 9-55023, the write compensation circuit is a circuit for parallel data, so that configuration of the circuit is complicated, which may cause the circuit to be larger in its scale as well as a heating value during the operation to extremely increase.
SUMMARY OF THE INVENTION
It is an object of the invention to provide a storage device which can transfer data at a higher rate as compared to that in the conventional technology and especially which can transfer write data at a high speed without causing lowering of amplitude of a write data pulse.
With the present invention, as an internal recording circuit capable of receiving parallel data is provided inside an enclosure thereof, a serial transfer path between a write amplifier and a circuit just before becomes remarkably shorter as compared to that in a magnetic disk device based on the conventional technology, so that write data can be transferred at a high speed without compensating a pulse amplitude by widening a pulse width.
Further parallel data transfer is executed in a section where a long transfer path is required to be provided between an external recording circuit outside the enclosure and an internal recording circuit inside the enclosure, so that write data can be transferred at a high speed without compensating a pulse amplitude by widening a pulse width.
Further, with the invention described above, as a write compensation circuit is provided between the parallel-to-serial conversion circuit and the write amplifier, data inputted to the write compensation circuit and data outputted therefrom are serial data, so that the write compensation circuit may comprise a circuit for handling serial data. For this reason, the currently

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