Storage device having head IC confirmation processing

Dynamic magnetic information storage or retrieval – General recording or reproducing – Signal switching

Reexamination Certificate

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Details

C360S046000, C360S025000

Reexamination Certificate

active

06377415

ABSTRACT:

BACKGROUND OF THE INVENTION
The present invention relates to a storage device used as an external storage device for a computer or the like as well as to a control unit and a control method for the same.
FIELD OF THE INVENTION
As an external storage device for a computer or the like, there has been used a storage device having a magnetic disk as a storage medium. A memory capacity of a storage device is increasing in association with the increase in the performance of a main system of a computer and increase in a program size of software used in computers. Accordingly, also a recording density has been becoming substantially higher, and at the same time there is the strong need for size reduction.
FIG. 8
is a block diagram showing electrical configuration of a storage device
100
based on the conventional technology. In this figure, the storage device
100
comprises a HDA (head disk assembly)
110
having a shielding vessel consisting of a base and a cover for shielding the magnetic disks
111
1
to
111
n
and magnetic heads
113
1
to
113
n
packaged therein, a printed circuit board
120
with various types of circuits such as a HDC (hard disk controller) circuit
121
A or a control circuit
125
A printed thereon, and a connector
140
for electrically connecting the components of the HDA
110
to the printed circuit board
120
. The storage device
100
is also connected to a CPU
150
provided in a main system of a computer not shown in the figure, and executes data write/read according to an instruction from the CPU
150
.
In the HDA
110
, magnetic disks
111
1
to
111
n
are n sheets of storage medium each magnetically storing data therein, and are respectively provided in a layered form along the axis of rotation. An SPM (spindle motor)
112
rotates the magnetic disks
111
1
to
111
n
at a high speed. Each of magnetic head
113
1
to
113
n
comprises a cut ring shaped head core having an extremely narrow gap between the two ends and a coil wound around the head core, and the magnetic head
113
1
to
113
n
are provided adjacent to the magnetic disks
111
1
to
111
n
respectively.
The magnetic heads
113
1
to
113
n
write a data into the magnetic disk
111
1
to
111
n
according to a magnetic field generated by a recording current supplied to the coil when data is written therein, and they also detect the data stored in the magnetic disks
111
1
to
111
n
as a regenerated voltage. The number of these magnetic heads are appropriately selected according to the number of the magnetic disks.
A carriage
114
is provided adjacent to the magnetic disks
111
1
to
111
n
, and supports the magnetic heads
113
1
to
113
n
. A VCM (voice coil motor)
115
moves the magnetic heads
113
1
to
113
n
by rotating the carriage. An FPC (flexible print circuit sheet)
116
is a flexible wiring material having a form like a sheet and is used for connection between the carriage
114
and each terminal (not shown herein) of the connector
140
.
Head IC (integrated circuit)
117
1
and head IC
117
2
each comprise a write amplifier and a preamplifier (both not shown herein), and are packaged on a surface of an FPC
116
in parallel to each other. The write amplifier switches the polarity of the recording current to be supplied to each of the magnetic heads
113
1
to
113
n
according to write data supplied from the CPU
150
, and the preamplifier amplifiers a regenerated voltage (read voltage) detected by each of the magnetic head
113
1
to
113
n
.
Herein, a number of magnetic heads which can be controlled by one head IC (for instance, head IC
117
1
) is naturally limited, and when the number n of the magnetic heads
113
1
to
113
n
exceeds the upper limit, two head ICs (in a case shown in the figure, the head ICs
117
1
and
117
2
) are provided, and the magnetic heads
113
1
to
113
n
are controlled by these two heads.
Thus, the head IC
117
1
shown in this figure is provided for a specified number of magnetic heads of the magnetic heads
113
1
to
113
n
, and the head IC
117
2
is provided for the remaining ones of the magnetic heads
113
1
to
113
n
.
When the number of magnetic heads
113
1
to
113
n
does not exceeds the upper limit, the head IC
117
2
need not be provided, and the magnetic heads
113
1
to
113
n
may be controlled by only the head IC
117
1
.
Further the head IC
117
1
and head IC
117
2
output a first IC current I
1
and a second IC current I
2
from each terminal not shown herein when a select signal Ss described later is inputted and selected. The first IC current I
1
and second IC current I
2
are outputted via the FPC
116
to the connector
140
.
The printed circuit board
120
is a board detachably attached via the connector
140
to a rear surface of the HDA
110
, and the connector
140
plays as an interface between components of the HDA
110
and various circuits packaged on the printed circuit board
120
. In the printed circuit board
120
described above, the HDC circuit
121
A is connected via a SCSI (Small Computer System Interface) bus not shown herein to the CPU
150
, and transacts various types of instruction, write data to be written in the magnetic disks
111
1
to
111
n
and read data read out from the magnetic disks
111
1
to
111
n
to the CPU
150
via the SCSI bus.
The HDC circuit
121
A generates a select command Cs for selecting one of the head ICs
117
1
and
117
2
, a control signal for controlling a format of recording and regeneration in the magnetic disks
111
1
to
111
n
or the like. Detailed description of operations of the HDC circuit
121
A is made later.
A buffer circuit
122
is a DRAM (Dynamic Random Access Memory) having a storage capacity of 512 K bytes, and temporally stores therein write data inputted from the CPU
150
and read data read out from the magnetic disks
111
1
to
111
n
.
A ROM (Read Only Memory)
123
stores a program for write/read control executed by the HDC circuit
121
A, and is accessed by the HDC circuit
121
A when the program is to be executed. A RAM (Random Access Memory)
124
temporarily stores the data generated when the above program is executed.
A read/write circuit
129
has circuits such as a modulating circuit for writing write data in the magnetic disks
111
1
to
111
n
, a parallel/serial converting circuit for converting parallel write data to serial data, a demodulating circuit for reading read data from the magnetic disks
111
1
to
111
n
or the like.
Further, the read/write circuit
129
has circuits such as a serial/parallel converting circuit for converting serial read data to parallel data, a synthesizer circuit for generated a timing signal for controlling timing for each section of the device by multiplying a frequency of an oscillation circuit using a quartz oscillator or the like. When a select command Cs is inputted from the HDC circuit
121
A, the control circuit
125
A outputs a select signal Ss to any of the head IC
117
1
and head IC
117
2
via the connector
140
and FPC
116
. Detailed description of operations of the control circuit
125
A is made later.
A servo demodulating circuit
126
demodulates servo patterns for positioning stored in the magnetic disks
111
1
to
111
n
by means of peak holding or integration. A VCM (Voice Coil Motor) driving circuit
127
drives the VCM
115
, and has a power amplifier (not shown) for supplying a driving current to the VCM
115
. A SPM (spindle motor) driving circuit
128
drives the SPM
112
, and has a power amplifier (not shown) for supplying a driving circuit via the connector
140
.
The control circuit
125
A recognizes a servo pattern demodulated by the servo demodulating circuit
126
, and controls a driving current supplied to the VCM driving circuit
127
and the SPM driving circuit
128
for providing positional controls over the magnetic heads
113
1
to
113
n
. The control circuit
125
A also controls the HDC circuit
121
A, read/write circuit
129
, buffer circuit
122
.
A pull-up circuit
131
is packaged on the printed circuit board
120
and is electrically conn

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