Static information storage and retrieval – Format or disposition of elements
Patent
1994-04-14
1999-11-16
Zarabian, A.
Static information storage and retrieval
Format or disposition of elements
365205, 36523008, G11C 502
Patent
active
059869135
ABSTRACT:
A processor (10) comprises a plurality of processing elements each having an input register (11), first memory bank (12), first sense amplifier (40), ALU (13), output register (16), second memory bank (15) and second sense amplifier (42). The first sense amplifier (40) is shared between the input register (11) and first memory bank (12). The second sense amplifier (42) is shared between the output register (16) and second memory bank (15). The sense amplifier (40,42) may be paused to prevent voltage spikes during a read/write operation, or to wait until a calculation is completed.
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Childers Jimmie Don
Takeyasu Masanari
Yamamoto Seiichi
Donaldson Richard L.
Laws Gerald E.
Marshall, Jr. Robert D.
Texas Instruments Incorporated
Zarabian A.
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