Active solid-state devices (e.g. – transistors – solid-state diode – Non-single crystal – or recrystallized – semiconductor... – Amorphous semiconductor material
Reexamination Certificate
2002-10-10
2004-11-09
Nelms, David (Department: 2818)
Active solid-state devices (e.g., transistors, solid-state diode
Non-single crystal, or recrystallized, semiconductor...
Amorphous semiconductor material
C257S304000, C257S306000, C257S347000, C349S038000, C349S042000, C349S043000
Reexamination Certificate
active
06815715
ABSTRACT:
CROSS REFERENCE TO RELATED APPLICATIONS
This application claims the priority benefit of Taiwan application serial no. 90127127, filed Nov. 1, 2001.
BACKGROUND OF INVENTION
1. Field of Invention
The present invention relates to a display device. More particularly, the present invention relates to a storage capacitor structure.
2. Description of Related Art
Display devices have found widespread usage in our daily life. Television and computer monitors are common display devices that show different kinds of images or motions on a screen. Formerly, cathode ray tubes were widely used. However, due to bulkiness and power consumption, cathode ray tubes cannot be used for portable equipment such as a notebook computer. Nowadays, consumers welcome the newly developed dot matrix type of flat panel displays such as liquid crystal display (LCD) or thin film transistor (TFT) LCD. An array of picture pieces or pixels on the TFT LCD constitutes an image with the switching of each pixel controlled by a thin film transistor.
FIG. 1
is a schematic diagram showing the driving circuit of a conventional thin film transistor liquid crystal display. The TFT LCD requires a scan circuit
100
and a signal-holding circuit
102
. The scan circuit
100
drives a group of scan lines
110
and the signal-holding circuit
102
drives a group of signal lines
112
. The scan lines
110
and the signal lines
112
cross each other perpendicularly forming a two-dimensional array. Each cross-point in the two-dimensional array has a thin film transistor
104
, a storage capacitor
108
and a liquid crystal display (LCD) cell
106
. The thin film transistor
104
, the storage capacitor
108
and the LCD cell
106
together constitute a pixel. The gate terminal of the thin film transistor
104
is controlled by the corresponding scan line
110
and the source terminal of the thin film transistor
104
is controlled by the corresponding signal line
112
. The drain terminal of the thin film transistor
104
is connected to a pixel electrode layer and an electrode of the storage capacitor
108
. The storage capacitor
108
maintains a voltage for controlling the liquid crystal. Another electrode of the storage capacitor
108
is connected to an adjacent scan line.
Following the gradual reduction in dimensional layout of a thin film transistor, a common electrode type of storage capacitor design is selected for reducing the effect of gate-driven delay. In this design, the common electrode and the gate terminal are separated from each other so that the other terminal of the capacitor receives a common voltage such as a common electrode voltage (Vcom).
FIG. 2
is a schematic diagram showing the layout of a unit cell of a conventional thin film transistor liquid crystal display. As shown in
FIG. 2
, the gate terminal of the thin film transistor
104
(
g
) is connected to the scan line
110
. The source terminal of the thin film transistor
104
(
s
) is connected to the corresponding signal line
1112
. The drain terminal of the thin film transistor
104
(
d
) is connected to a pixel electrode layer
118
. A common lower electrode
114
and an upper electrode
116
together constitute a storage capacitor. The pixel electrode layer
118
and the upper electrode
116
are linked through an opening
120
.
The lower electrode
114
is formed on a transparent substrate. The lower electrode
114
made of a first metallic layer is patterned together with the gate terminal of the thin film transistor
104
. A capacitor dielectric layer is formed on the lower electrode
114
. A metallic electrode layer
116
made of a second metallic layer is formed on the capacitor dielectric layer to serve as an upper electrode for the storage capacitor. The overlapping region between the upper electrode
116
and the lower electrode
114
is the main charge storage area for the capacitor. A passivation layer is formed on the upper electrode
116
and surrounding areas. The passivation layer has an opening
120
that exposes a portion of the upper electrode
116
. A pixel electrode layer
118
is electrically connected to the upper electrode
116
through the opening
120
. Finally, other structural components of a liquid crystal display such as a color filter panel is assembled with the transparent substrate and a liquid crystal (not shown) is injected therein to form a liquid crystal display.
In the aforementioned LCD structure, the channel regions of most thin film transistors
104
are made using amorphous silicon (Si:H). During the patterning operation, some conductive residual material such as unwanted amorphous silicon material
115
may deposit along the edges of the capacitor lower electrode
114
and accumulate above the capacitor dielectric layer
124
. Hence, in the fabrication of the so-called second metallic layer for forming the capacitor upper electrode
116
and the signal lines
112
, the upper electrode
116
will cover and cross over the edges of the lower capacitor electrode
114
of the capacitor. If some of the conductive residual material
115
is retained on the capacitor dielectric layer
124
, a short circuit between the capacitor upper electrode
116
, the signal line
112
and the pixel electrode
118
will occur leading to pixel defects in the LCD array.
The presence of conductive residual material
115
may also lead to a short circuit between the upper and the lower capacitor electrode causing the storage capacitor
108
to malfunction. The conductive residual material
115
may be removed by shining a laser beam and burning out the material. However, the process may also break the normal line connection with the common electrode
114
and lead to a shallow line for the gate terminal. To prevent the formation of shallow lines, the defective capacitor is frequently not repaired so that the defective bright spot remains on the LCD.
Nevertheless, stringent demand for high quality image in the market is a major force for the use of laser to repair bright spot and attain a zero bright spot target. At present, laser repair technique has not progressed far enough for spot darkening to be carried out as routine. This is because the common electrode and the gate terminal may form a short circuit after the repair and result in a bright line defect. Thus, a method capable of repairing storage capacitor point defect and at the same time permitting the execution of spot darkening operations is needed for improving image quality.
SUMMARY OF INVENTION
Accordingly, one object of the present invention is to provide a storage capacitor structure having a capacitor lower electrode larger than a corresponding capacitor upper electrode achieved by shrinking the edges of the upper electrode. Due to non-overlapping of the capacitor upper electrode with the edges of the capacitor lower electrode, the probability of short circuiting between the capacitor and a nearby signal line in the presence of conductive residual material is greatly reduced.
To achieve these and other advantages and in accordance with the purpose of the invention, as embodied and broadly described herein, the invention provides a storage capacitor structure. The capacitor structure includes a first capacitor electrode on a substrate, a capacitor dielectric layer on the first capacitor electrode and a second capacitor electrode on the capacitor dielectric layer. The second capacitor electrode has a surface area smaller than the first capacitor electrode. A passivation layer is formed on the second capacitor electrode. The passivation layer has an opening that exposes a portion of the second capacitor electrode. A pixel electrode layer is formed on the passivation layer. The pixel electrode layer and the second capacitor electrode are connected through the opening in the passivation layer.
In the aforementioned capacitor structure, the pixel electrode is connected to a switching element. With the second capacitor electrode having a surface area smaller than the first capacitor electrode, the edges of the first capacitor electrode do not overlap with that of the secon
Kuo Chin-Jung
Wang Tong-Jung
Wu Yuan-Liang
Chi Mei Optoelectronics Corporation
J.C. Patents
Tran Long
LandOfFree
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