Storage and retrieval for resistance-based memory devices

Static information storage and retrieval – Read only systems – Resistive

Reexamination Certificate

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C365S097000, C365S158000

Reexamination Certificate

active

06570782

ABSTRACT:

FIELD OF THE INVENTION
The invention is generally related to resistance-based memory devices and, more particularly, is related to systems and methods for storing and retrieving data and software in resistance-based memory devices.
DESCRIPTION OF THE RELATED ART
There is an increasing demand for cost-effective resistance-based memory modules which offer the advantage of reduced size and improved storage capacity. A resistance based memory module may be, for example, a read only memory (ROM) or a magnetic random access memory (MRAM). Each memory cell in a resistance-based memory module comprises a resistive memory component. The resistance value of any one memory component can be designed to be relatively high (e.g., 10 Meg ohms), which translates to a logical bit value of one, or relatively low (e.g., 100 Kilo ohms), which translates to a logical bit value of zero. The resistance of a selected memory cell can be determined by applying a voltage to the memory cell and measuring the current that flows through it. The resistance value of a memory cell is proportional to the value of the current flowing through it.
One problem with resistance-based memory modules is that during a read operation for determining the resistance value of a memory component, a parasitic or “sneak” current may flow through adjacent memory components that are not being read and may cause a false reading for the targeted memory component. Furthermore, resistance-based memory modules are often incorporated into portable wireless communications systems which have a need for low power consumption. Therefore, there is a need for systems and methods for reducing sneak currents and/or power consumption in resistance-based memory modules.
SUMMARY OF THE INVENTION
The present invention provides systems and methods for storing and retrieving data and software. In one embodiment of the invention, a method for storing a bit sequence includes converting a first bit sequence containing a first number of low-resistance bits into a second bit sequence containing a second number of low-resistance bits that is lower than the first number of low-resistance bits, and then storing the second bit sequence in a resistance-based memory device.
In another embodiment of the invention, a method for retrieving a bit sequence includes retrieving a first bit sequence from a resistance-based memory device, and then converting the first bit sequence containing a first number of low-resistance bits into a second bit sequence containing a second number of low-resistance bits that is higher than the first number of low-resistance bits.


REFERENCES:
patent: 6483734 (2002-11-01), Sharma et al.

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