Sticky bit predictor for floating-point multiplication

Details Sticky bit predictor for floating-point multiplication Sticky bit predictor for floating-point multiplication

1988-09-23

1990-05-22

Harkcom, Gary V.

Boots, shoes, and leggings

364757, G06F 738, G06F 752

Patent

active

049282590

ABSTRACT:
In a floating-point multiplication of two numbers in which a value of a sticky bit is needed, each of two trailing zero encoders calculates the number of trailing zeroes associated with its mantissa. The sum of the two trailing zero counts determines the number of trailing zeroes in the mantissa product. This sum is compared to a constant to determine the sticky bit. Each encoder is comprised of a plurality of individual encoders arranged in a plurality of rows for providing the trailing zero count.

REFERENCES:
patent: 4270167 (1981-05-01), Koehler et al.
patent: 4338675 (1982-07-01), Palmer et al.
patent: 4484259 (1984-11-01), Palmer et al.
patent: 4748575 (1988-05-01), Ashkin et al.
patent: 4758972 (1988-07-01), Frazier
IEEE Standard for Binary Floating-Point Arithmetic, Aug. 1985, (ANS/IEEE Std. 754-1985).
Introduction to Arithmetic for Digital Systems Designers; Shlomo Waser and Michael Flynn; 1982; pp. 103-104.

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