Sticky bit detection and shifting logic

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3647365, G06F 700, G06F 1500

Patent

active

049997963

ABSTRACT:
A circuit which concurrently performs bit shifting for floating point arithmetic and sticky bit determination. An input data operand is presented to the circuit along with a control signal which determines the number of digit positions to be shifted. While shifting of bits occurs to provide a shifted output operand, detection of bits which are shifted off from the output operand for the presence of sticky bits occurs. A shifted output operand and a sticky bit detect signal are provided substantially concurrently. An efficient layout of the circuit significantly minimizes the area required to implement both functions.

REFERENCES:
patent: 4383304 (1983-05-01), Hirashima
patent: 4509144 (1985-04-01), Palmer et al.
patent: 4864527 (1989-09-01), Peng et al.
patent: 4887232 (1989-12-01), Wolrich et al.
patent: 4901263 (1990-02-01), Ho et al.

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