Miscellaneous active electrical nonlinear devices – circuits – and – Specific identifiable device – circuit – or system – With specific source of supply or bias voltage
Reexamination Certificate
2001-02-23
2002-02-05
Riley, Shawn (Department: 2838)
Miscellaneous active electrical nonlinear devices, circuits, and
Specific identifiable device, circuit, or system
With specific source of supply or bias voltage
C323S281000, C365S227000
Reexamination Certificate
active
06344771
ABSTRACT:
BACKGROUND OF THE INVENTION
1. Field of the Invention
The present invention relates to a step-down power-supply circuit for a semiconductor integrated circuit, particularly to a low-power-consumption step-down power-supply circuit to be effectively used for a low-power-consumption SRAM.
2. Description of the Prior Art
In recent years, because an SRAM consumes a very small power-supply current, for example, 10 &mgr;A or less, under a standby state, it is possible to reduce the power consumption of a battery indispensable for a portable electric appliance. Therefore, a low-power-consumption SRAM is used for a portable electric appliance such as a portable telephone. Moreover, to improve performances and reduce costs, high-density integration of an SRAM is now in progress. However, when the SRAM is high integrated, the gate length of a transistor used decreases and, thereby, the withstand voltage lowers. Therefore, it is necessary to lower the power voltage to be supplied to an SRAM. However, the power-supply voltage of an electric appliance using an SRAM depends not only on the characteristic of the SRAM but also on characteristics of various devices and it is difficult to simply lower the power-supply voltage. Therefore, a step-down power-supply circuit has been used so far in an SRAM.
FIG. 7
illustrates a conventional step-down power-supply circuit.
FIG. 8
illustrates the characteristic of the output voltage VDC of the step-down power-supply circuit
100
shown in FIG.
7
. In
FIGS. 7 and 8
, when the power-supply voltage VCC to be supplied to the step-down power-supply circuit
100
is equal to the voltage of the first region, the ratio of the output voltage VDC to the power-supply voltage VCC become 1:1, that is, VDC becomes equal to VCC. However, when the power-supply voltage VCC is equal to the voltage of the second region, it becomes constant at a predetermined value not exceeding the withstand voltage of an SRAM. However, a region in which the output voltage VDC becomes lower than a predetermined value and has a V-shaped characteristic may be present in the second region as shown by A in
FIG. 8
depending on setting of the characteristic value of each device used for the circuit in
FIG. 7
or fluctuation of characteristics of each device when it is manufactured.
In
FIG. 7
, the step-down power-supply circuit
100
comprises a first output circuit
106
constituted of P-channel MOS transistors (hereafter referred to as PMOS transistors)
101
,
102
and a high-resistance resistors
103
to
105
and a second output circuit
118
constituted of N-channel MOS transistors (hereafter referred to as NMOS transistor)
111
to
115
and a high-resistance resistor
116
. The diode-connected NMOS transistors
111
to
114
for respectively connecting a gate with a drain are connected in series in the forward direction and the series circuit constitutes a clamping circuit.
The first output circuit
106
operates in the first region in
FIG. 8
so that the output voltage VDC becomes equal to the power-supply voltage VCC in order to secure the operational margin of the SRAM in a region in which the value of the power-supply voltage VCC is small. However, the second output circuit
118
operates in the second region in FIG.
8
and in a region in which the value of the power-supply voltage VCC is large. In the first output circuit
106
, the gate voltage VA of the PMOS transistor
101
can be shown by the following equation (a).
VA=VCC×R
104
/(R
103
+R
104
) (a)
wherein R
103
and R
104
represent respective resistance values of the resistor
103
and
104
.
The PMOS transistor
101
is turned on when the difference between the gate voltage VA and the power-supply voltage VCC serving as a source voltage becomes equal to or larger than the absolute value |VTP| of the threshold value of the PMOS transistor
101
. When the power-supply voltage VCC is kept at the voltage level of the first region, the voltage between the gate and source of the PMOS transistor
101
is lower than the absolute value |VTP| of the threshold voltage and the PMOS transistor
101
is turned off. Therefore, the gate of the PMOS transistor
102
is grounded through the resistor
105
. When the power-supply voltage VCC reaches the absolute value |VTP| of the threshold voltage of the PMOS transistor
102
, the PMOS transistor
102
is turned on and the output voltage VDC becomes the same value as the power-supply voltage VCC.
When the power-supply voltage VCC further rises, the voltage between the gate and source of the PMOS transistor
101
reaches the absolute value |VTP| of the threshold voltage and the PMOS transistor
101
is turned on. The condition in the above case can be shown by the following equation (b).
VCC=VA+|VTP| (b)
The power-supply voltage VCC in the equation (b) is defined by the following equation (c) when considering the above equation (a).
VPC=VPC×R
104
/(R
103
+R
104
)+|VTP| (c)
The following equation (d) can be obtained from the above equation (c).
VPC=(
1
+R
104
/R
103
)×|VTP| (d)
When the PMOS transistor
101
is turned on, the gate voltage of the PMOS transistor
102
becomes equal to the power-supply voltage VCC because the resistor
105
has a very high resistance value and the PMOS transistor
102
is turned off and brought into a cutoff state. That is, VPC becomes equal to the power-supply voltage VCC when an output from the first output circuit
106
ceases.
The second output circuit
118
operates in the second region. In the second output circuit
118
, assuming that the threshold voltage of the NMOS transistors
111
to
115
is VTN, no current is supplied to the NMOS transistors
111
to
114
before the gate voltage VB of the NMOS transistor
115
becomes (4×VTN). Thus, the power-supply voltage VCC is applied to the gate of the NMOS transistor
115
through the resistor
116
. Therefore, the output voltage VDC output from the NMOS transistor
115
in the first region becomes a value lowered by the threshold voltage VTN of the NMOS transistor
115
from the power-supply voltage VCC and is shown by the following equation (e).
VDC=VCC−VTN (e)
However, because the output voltage VDC of the first region depends on an output voltage of the PMOS transistor
102
that is higher than the voltage shown by the equation (e), VDC becomes equal to VCC. When the power-supply voltage VCC reaches (4×VTN), the gate voltage VB of the NMOS transistor
115
is clamped at (4×VTN) which has the following relation shown by the equation (f) if the power-supply voltage VCC at the time the gate voltage is so clamped is assumed to be VNC:
VNC=4×VTN (f)
Moreover, though it is necessary to assure operations of an SRAM also in a region in which the output voltage VDC has the V-shaped characteristic shown by A in
FIG. 8
, the value of the power-supply voltage VCC at which the level of the output voltage VDC is minimized in the region depends on each SRAM. Accordingly, problems occur that the product cost rises and the manufacturing period increases because it is necessary to perform tests by changing values of the power-supply voltage VCC bit by bit nearby a region having a V-shaped characteristic and moreover, add tests to be performed with temperature taken into consideration because the V-shaped characteristic region changes with change in temperature.
Therefore, VNC≦VPC is a necessary condition in order to prevent the output voltage VDC from having the V-shaped characteristic shown by A in FIG.
8
. However, because parameters of devices constituting the above equations (d) and (f) are not directly related to each other, a problem occurs that the condition of VNC≦VPC may not be satisfied due to the manufacturing fluctuation that only the threshold voltage of an NMOS transistor rises.
The present invention is made to so
McDermott & Will & Emery
Mitsubishi Denki & Kabushiki Kaisha
Riley Shawn
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