Electricity: power supply or regulation systems – Self-regulating – Using a three or more terminal semiconductive device as the...
Reexamination Certificate
2000-11-21
2002-05-21
Vu, Bao Q. (Department: 2838)
Electricity: power supply or regulation systems
Self-regulating
Using a three or more terminal semiconductive device as the...
C323S313000, C323S317000
Reexamination Certificate
active
06392394
ABSTRACT:
BACKGROUND OF THE INVENTION
1. Field of the Invention
The present invention relates to a step-down circuit, and more particularly to a step-down circuit for reducing external supply voltage to be supplied from the outside to supply it to an internal circuit.
2. Description of the Prior Art
In recent years, in a semiconductor integrated circuit device such as a semiconductor storage, external supply voltage VEX to be supplied from the outside is not only used as it is, but also is reduced or raised to generate predetermined internal supply voltage VCC for supplying to internal circuits necessitating it respectively to thereby reduce power consumption and improve reliability of elements.
A step-down circuit for generating internal supply voltage (step-down voltage) VCC by reducing external supply voltage VEX is used to protect so as to prevent any voltage which exceeds gate withstand voltage of a transistor, which is a component of the internal circuit, from being applied, and is generally constituted by a reference voltage generating circuit for generating predetermined reference voltage, a comparator for comparing the reference voltage with the internal supply voltage, which is output voltage, to control such that they coincide with each other, and an output transistor for supplying the internal supply voltage VCC to the internal circuit.
Since, however, it has been requested for the semiconductor integrated circuit device in recent years to further reduce consumption current for the entire device, it is desirable to reduce also consumption current in the step-down circuit. However, in a comparator (amplifier) for use in the step-down circuit, it is generally necessary to flow steady state current of several tens or more of VA in an operational state, and therefore, it is difficult to reduce the consumption current.
In order to comply with such a request, for example, technique for reducing consumption current by stopping the operation of the step-down circuit during standby of a semiconductor storage has been proposed in Japanese Patent Laid-Open Application No. 11-45947.
FIG. 12
shows the circuit disclosed in this Japanese Patent Laid-Open Application No. 11-45947.
FIG. 12
is a circuit diagram showing the structure of a conventional step-down circuit.
As shown in
FIG. 12
, the semiconductor storage disclosed in the Japanese Patent Laid-Open Application No. 11-45947 is constituted by a step-down circuit
2
for reducing external supply voltage VEX to be supplied from the outside to supply it to an internal circuit
1
as the internal supply voltage VCC, and a diode circuit
3
to be inserted between the external power supply and a power supply terminal of the internal circuit
1
, for reducing the external supply voltage VEX by the use of a diode.
An operation
on-operation of the step-down circuit
2
is controlled through a chip select signal CS to be supplied from the outside. The diode circuit
3
is constituted by a plurality of diodes (D
11
and D
12
in
FIG. 12
) connected in a forward direction from the external power supply toward the internal circuit
1
such that voltage equal to the internal supply voltage VCC to be outputted from the step-down circuit
2
is supplied to the internal circuit
1
by voltage drop caused by forward voltage of each diode.
In such structure, when the semiconductor storage to be mounted with the circuit shown in
FIG. 12
is in a standby state, the chip select signal CS is negated (set to high level) by a controlling device not shown, and the step-down circuit
2
is set to a non-operational state to supply necessary electric power to the internal circuit
1
through the diode circuit
3
.
On the other hand, when the semiconductor storage is in an ordinary operational state, the chip select signal CS is asserted (set to low level), and the step-down circuit
2
is set to an operational state to supply necessary electric power to the internal circuit
1
through the step-down circuit
2
.
As described above, the operation of the step-down circuit
2
is caused to be stopped during standby, and necessary electric power is supplied to the internal circuit
1
from the external power supply through the diodes to thereby reduce the consumption current in the semiconductor storage during standby.
The external supply voltage VEX to be supplied to any semiconductor IC packaged on a printed board fluctuates by current flowing through other semiconductor IC and the like packaged on the same printed board (hereinafter, referred to as power supply vamp).
Of such conventional step-down circuits as described above, the step-down circuit shown in
FIG. 12
is constructed so as to supply the internal supply voltage VCC to the internal circuit through the diodes during standby, and therefore, when the power supply vamp raises the external supply voltage VEX, voltage thus raised by the power supply vamp is also applied to the internal circuit in addition to the step-down voltage. Since generally consumption current through the internal circuit during standby is much less, when the external supply voltage VEX is raised by the power supply vamp during standby, the internal supply voltage VCC to be applied to the internal circuit will be maintained at voltage raised by the capacitance of the power supply line and the load capacitance as it is for many hours even if the external supply voltage VEX drops thereafter. Also, at this time, even if the semiconductor storage is shifted from the standby state to the operational state, some time is required for the step-down circuit to output predetermined step-down voltage, and therefore, higher voltage than the step-down voltage will be continuously applied during that period of time.
Therefore, since higher voltage than the step-down voltage is applied for many hours, the insulating performance of the gate oxide of the transistor, which is a component of the internal circuit, might be deteriorated to thereby worsen the transistor characteristics.
On the other hand, in a step-down circuit constituted by the reference voltage generating circuit, the comparator and the output transistor, since it is necessary to flow steady state current of several tens or more of &mgr;A through the comparator as described above, it is difficult to reduce the consumption current.
BRIEF SUMMARY OF THE INVENTION
Objects of the Invention
It is an object of the present invention to provide a step-down circuit capable of preventing the characteristics of the transistors within the internal circuit from being deteriorated by application of higher voltage than the step-down voltage for many hours, and reducing consumption current through the internal circuit.
SUMMARY OF THE INVENTION
A step-down circuit according to the present invention for reducing external supply voltage to be supplied from the outside to supply it to the internal circuit is provided with a diode circuit for reducing the external supply voltage by desired voltage to output it as the internal supply voltage, a pull-down transistor for pulling down the internal supply voltage to be outputted from the diode circuit when the external supply voltage drops, and a controlling circuit for controlling the operation of the pull-down transistor.
REFERENCES:
patent: 4990847 (1991-02-01), Ishimaru et al.
patent: 5189316 (1993-02-01), Murakami et al.
patent: 5506495 (1996-04-01), Uchida
patent: 5757226 (1998-05-01), Yamada et al.
patent: 5861771 (1999-01-01), Matsuda et al.
patent: 5990671 (1999-11-01), Nagata
patent: 6005379 (1999-12-01), Wong et al.
patent: 6064188 (2000-05-01), Takashima et al.
patent: 11-45947 (1999-02-01), None
Nakagawa Atsushi
Takahashi Hiroyuki
Katten Muchin Zavis & Rosenman
Vu Bao Q.
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