Stencil masks and methods of manufacturing stencil masks

Radiation imagery chemistry: process – composition – or product th – Radiation modifying product or process of making – Radiation mask

Reexamination Certificate

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C378S034000, C378S035000

Reexamination Certificate

active

06300017

ABSTRACT:

TECHNICAL FIELD
The invention pertains to stencil masks, and to methods of manufacturing stencil masks.
BACKGROUND OF THE INVENTION
Ion and electron beam lithographic systems utilize a stencil mask to pattern a resist coated target. These stencil masks typically comprise a substrate and a pattern of openings formed through the substrate. Commonly the substrate will be formed of a semiconductive material, such as silicon. However, other deposited or grown materials, such as SiC, SiN and BN can also be used to form at least some of the substrate.
The formation of a patterned opening extending through substrates comprising silicon, SiC, SiN and/or BN can be quite challenging as such substrates are frequently thin and brittle. Accordingly, it would be desirable to develop alternative methods of forming and patterning openings in such substrates.
Additionally, it can be challenging to maintain the dimension of an opening formed in a thin substrate comprising silicon, SiC, SiN and/or BN, as the material around such openings tends to easily deform (i.e., warp, bow or otherwise alter its shape after formation of the openings). Such deformations can undesirably change the dimensions of the openings and thus alter a pattern of openings formed in a stencil mask substrate. Accordingly, it is desirable to develop methods of maintaining a pattern of openings within a stencil mask substrate.
Stencil masks are typically formed by either a wafer flow method, or a membrane flow method. In a wafer flow method, a full thickness wafer is processed to form a pattern of openings extending into the wafer. The wafer is then reduced in thickness (to a thickness of, for example, from about 2 microns to about 10 microns) to form a membrane. In a membrane flow process, a semiconductive material wafer is first reduced to about a thickness of a silicon membrane. The membrane is then processed to form a pattern of openings through the membrane.
SUMMARY OF THE INVENTION
In one aspect, the invention encompasses a method of manufacturing a stencil mask. A plurality of opening locations are defined within substrate. A dopant is provided within the substrate in a pattern which forms a plurality of first regions doped to a concentration with a dopant and one or more second regions not doped to the concentration with the dopant. Individual first regions surround individual opening locations. A plurality of openings is formed within the opening locations. The individual openings extend into the substrate. A stencil mask is formed from the substrate having the openings extending therein.
In another aspect, the invention encompasses a method of manufacturing a stencil mask from a semiconductive material. A patterned material is formed over the semiconductive material. The patterned material covers portions of the semiconductive material and leaves other portions uncovered. A first dopant is provided into the uncovered portions of the semiconductive material. The first dopant is driven beneath the patterned material. The uncovered portions of the semiconductive material are removed to form openings extending into, but not through, the semiconductive material, then additional semiconductive material is removed until the openings extend entirely through the semiconductive material.
In yet another aspect, the invention encompasses a stencil mask. The stencil mask includes a substrate having a plurality of openings extending through it. The stencil mask further includes a pattern of dopant within the substrate. The pattern comprises a plurality of first locations doped to a concentration with a dopant and one or more second locations not doped to the concentration with the dopant. Individual first locations surround individual openings.


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