Radiation imagery chemistry: process – composition – or product th – Radiation modifying product or process of making – Radiation mask
Reexamination Certificate
2000-10-04
2002-10-22
Young, Christopher G. (Department: 1756)
Radiation imagery chemistry: process, composition, or product th
Radiation modifying product or process of making
Radiation mask
C378S034000, C378S035000
Reexamination Certificate
active
06468701
ABSTRACT:
BACKGROUND OF THE INVENTION
The present invention relates to a stencil mask to be used for an electron beam exposure, an ion-beam exposure and an X-ray beam exposure and a method of forming the stencil mask.
The stencil mask has a pattern of opening to be used for an electron beam exposure, an ion-beam exposure and an X-ray beam exposure in order to form a pattern over a metal thin film or a semiconductor substrate. The stencil mask is thus used as a mask to carry out an exposure to the resist film applied over the metal thin film or the semiconductor substrate in order to form a first resist pattern. The opening pattern of the stencil mask allows transmission of the electron beam, the ion-beam exposure or the X-ray beam and irradiation thereof onto the resist film.
An available wafer for the stencil mask may comprise combined wafers of a first silicon substrate having a pattern and a second silicon substrate serving as a supporting substrate. Another wafer for the stencil mask may comprise a single silicon substrate having an impurity doped epitaxial silicon layer. Usually, the combined wafers are often used. In any event, the stencil mask may comprise combined wafers of a first silicon substrate having a pattern and a second silicon substrate serving as a supporting substrate. The second silicon substrate as the supporting substrate is to prevent any deformation of the stencil mask. The stencil mask is so placed in an exposure system that the second silicon substrate is positioned under the first silicon substrate which will have a pattern. The second silicon substrate supports the first silicon substrate and prevents any deformation of the first silicon substrate. An etching stopper layer is often interposed between the first and second silicon substrates for protecting the first silicon substrate from any over-etching when the second silicon substrate is etched. This interposed layer serving as the etching stopper layer may comprise an inorganic layer such as a silicon dioxide layer. In Japanese laid-open patent publication No. 5-216216, it is disclosed that a first conventional stencil mask comprises the combined first and second silicon substrate, between which the inorganic etching stopper layer is interposed. Further, this publication also discloses that a second conventional stencil mask comprises the combined first and second silicon substrate, between which an ion-implanted layer is interposed.
FIGS. 1A through 1E
are fragmentary cross sectional elevation views illustrative of a first conventional method of forming a first conventional stencil mask.
With reference to
FIG. 1A
, an inorganic film
112
of silicon dioxide having a thickness of 1 micrometer is deposited on a first silicon substrate
111
.
With reference to
FIG. 1B
, a second silicon substrate
113
is placed on the inorganic film
112
. A heat treatment is carried out at a temperature of 1100° C. for two hours, thereby to combine the first and second silicon substrates
111
and
113
to each other.
With reference to
FIG. 1C
, the second silicon substrate
113
is polished to reduce the thickness thereof to about 30 micrometers. First and second passivation inorganic films
114
-
1
and
114
-
2
of silicon dioxide having a thickness of 500 nanometers are formed on both surfaces of the combine the first and second silicon substrates
111
and
113
respectively. A first resist pattern is formed on the first passivation inorganic film
114
-
1
on the first silicon substrate
111
by use of a lithography technique. The first resist pattern is used as a mask for carrying out a selective etching to the first passivation inorganic film
114
-
1
on the first silicon substrate
111
for selectively removing the first passivation inorganic film
114
-
1
, so that a center region of the bottom surface of the first silicon substrate
111
is shown. This first resist pattern is further used to carry out a back etching process as a wet etching to the first silicon substrate
111
by use of an ethylene amine pyrocatechol solution, so that a center region of the bottom surface of the inorganic film
112
is shown.
With reference to
FIG. 1D
, the first and second passivation inorganic films
114
-
1
and
114
-
2
are completely removed. A second resist pattern
115
is formed on a top surface of the second silicon substrate
113
by use of a lithography technique.
With reference to
FIG. 1E
, the second resist pattern
115
is used as a mask for carrying out a selective etching to the second silicon substrate
113
and the inorganic film
112
to form penetrating openings
200
, whereby a stencil mask is completed which is superior in mechanical strength and high thermal stability.
In accordance with the first conventional stencil mask, the number of the fabrication processes is remarkably reduced. It is also easy to form the etching stopper interposed between the first and second silicon substrates. The first conventional stencil mask is capable of cutting an electron beam under an acceleration voltage of 50 kV. The first conventional stencil mask is also superior in thickness uniformity. The silicon dioxide film as the interposed etching stopper may be replaced with a silicon nitride film.
FIGS. 2A through 2E
are fragmentary cross sectional elevation views illustrative of a second conventional method of forming a second conventional stencil mask.
With reference to
FIG. 2A
, an ion-implantation is carried out at an acceleration voltage in the range of 50-100 kV and a dose of 1E20/cm 2 for ion-implanting boron ions
142
into an upper region of a silicon substrate
111
to form an ion-implanted region
141
in the upper region of the silicon substrate
111
.
With reference to
FIG. 2B
, a silicon epitaxial layer
143
is formed on the ion-implanted region
141
of the silicon substrate
111
. First and second passivation silicon nitride films
144
-
1
and
144
-
2
on the bottom surface of the silicon substrate
111
and on the silicon epitaxial layer
143
, respectively.
With reference to
FIG. 2C
, a first resist pattern not illustrated is formed on the first passivation silicon nitride film
144
-
1
by use of a lithography technique. The first resist pattern not illustrated is used as a mask for carrying out a selective etching to the first passivation silicon nitride film
144
-
1
on the bottom surface of the silicon substrate
111
for selectively removing the first passivation silicon nitride film
144
-
1
, so that a center region of the bottom surface of the silicon substrate
111
is shown. This first resist pattern is further used to carry out a back etching process as a wet etching to the silicon substrate
111
by use of an ethylene amine pyrocatechol solution, so that a center region of the ion-implanted region
141
is shown. The first and second passivation silicon nitride films
144
-
1
and
144
-
2
are completely removed.
With reference to
FIG. 2D
, a second resist pattern
145
is formed on a top surface of the silicon epitaxial layer
143
by use of an electron beam lithography technique.
With reference to
FIG. 2E
, the second resist pattern
145
is used as a mask for carrying out a selective etching to the silicon epitaxial layer
143
and the ion-implanted region
141
to form penetrating openings
200
, whereby a stencil mask is completed.
In accordance with the second conventional stencil mask, the ion-implanted region
141
serves as an etching stopper to the etching process to the silicon substrate
111
from the bottom side.
The first conventional stencil mask has a lamination structure of the silicon substrate, the silicon dioxide film and the silicon substrate. The second conventional stencil mask has a lamination structure of the silicon substrate, the ion-implanted region, and the impurity doped silicon epitaxial layer.
The above described first and second conventional fabrication processes have a problem in variation in etching rate of the back etching process for etching the silicon substrate serving as the supporting substrate. It is ideal for the back etching proces
NEC Corporation
Young Christopher G.
Young & Thompson
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