Statistical circuit

Details Statistical circuit Statistical circuit

2005-06-02

2009-02-17

Ortiz Criado, Jorge L (Department: 2627)

Dynamic information storage or retrieval

Binary pulse train information signal

Including sampling or a/d converting

C369S059170, C369S053110

Reexamination Certificate

active

07492690

ABSTRACT:
The statistical circuit includes a pulse-width measuring unit, serially coupling delay units, a logical circuit and counters. The pulse-width measuring unit is for receiving a sampling signal and generating a pulse-width signal. A pulse occurs on the pulse-width signal as the sampling signal has status change. The delay units include a first delay unit for receiving the pulse-width signal and outputting delay signals according to the trigger of a reference clock. The output of the first delay unit is used as a reset signal. The logic circuit is for receiving the pulse-width signal and the reset signal and generating a counting signal. The counting signal is enabled for a period of time as a pulse occurs on the pulse-width signal. The counters are respectively for receiving the delay signals and counting the number of the received delay signals in a first status as the trigger signal is enabled.

REFERENCES:
patent: 4908771 (1990-03-01), Piot

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