Static type semiconductor memory device with timer circuit

Details Static type semiconductor memory device with timer circuit Static type semiconductor memory device with timer circuit

1998-02-05

1999-08-10

Fears, Terrell W.

Static information storage and retrieval

Addressing

Sync/clocking

365154, 36523008, G11C 1300

Patent

active

059369116

ABSTRACT:
In a static type semiconductor memory device, a word decoder is connected to a plurality of word lines to decode an address signal to select one of the plurality of word lines. A resistor load type memory cell is connected to said selected word line. The resistor load type memory cell is composed of two pairs of a load resistor and a MOS transistor and the two pairs are connected to form a flip-flop. A word line voltage boosting circuit is connected to the word decoder to boost a voltage of the selected word line to a voltage higher than a power supply voltage in response to a boost control signal. A timer circuit includes a replica of the load transistor of one of the two pair and replicas of the MOS transistors of the two pair. The timer circuit generates the boost control signal for a predetermined time period in response to a start control signal to activate said word line voltage boosting circuit.

REFERENCES:
patent: 5642320 (1997-06-01), Jang

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