Static semiconductor memory device with reduced power consumptio

Static information storage and retrieval – Addressing – Plural blocks or banks

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Details

36518905, 365154, G11C 1604, G11C 800, G11C 1100

Patent

active

059739843

ABSTRACT:
Memory blocks having word lines driven into selected states independently of each other are provided in correspondence to data input/output bits respectively. Each memory cell includes a bipolar transistor and a MOS transistor. In each memory block, a current flows to a bit line only of a selected column, and a 1-bit memory cell is accessed therein. Thus, sense amplifiers and write drivers have only to be provided in numbers corresponding to that of the data bits, whereby the circuit occupying area as well as current consumption are reduced.

REFERENCES:
patent: 4813017 (1989-03-01), Wong
patent: 5140550 (1992-08-01), Miyaoka et al.
patent: 5764565 (1998-06-01), Sato et al.
patent: 5764566 (1998-06-01), Akamatsu et al.

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