Static random access memory with tri-layer conductor constructio

Details Static random access memory with tri-layer conductor constructio Static random access memory with tri-layer conductor constructio

1989-09-13

1990-12-04

Clawson, Jr., Joseph E.

Static information storage and retrieval

Interconnection arrangements

Transistors or diodes

365154, 357 41, 357 54, 357 59, G11C 506

Patent

active

049758756

ABSTRACT:
The present invention relates to a semiconductor memory device and more particularly to a static random access memory (S-RAM), which is of a structure in which the bit lines electrically connected with the diffusion regions of the access transistors are arranged so as not to be broken.
According to the present invention, the bit lines are first led out to the positions over the gate electrodes of the access transistors and then extended opposite to each other in the extended direction of a pair of bit lines so as to be connected with these bit lines.
By virtue of such an arrangement, it is made achievable to increase packaging density and improve reliability on the device.

REFERENCES:
patent: 4631705 (1986-12-01), Honda
patent: 4744056 (1988-05-01), Yu et al.
patent: 4853894 (1989-08-01), Yamanaka et al.

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