Static random access memory with merged bit lines

Details Static random access memory with merged bit lines Static random access memory with merged bit lines

1979-11-13

1982-03-30

Fears, Terrell W.

Static information storage and retrieval

Floating gate

Particular biasing

365174, G11C 1140

Patent

active

043228240

ABSTRACT:
A static Random-Access-Memory having a single bit line between each pair of adjacent columns of memory cells, implemented in a self-aligned, N-channel, silicon-gate system. Resistor element load devices are made in second-level polycrystalline silicon by an ion implant step. The second-level polycrystalline silicon is insulated from the first-level polycrystalline silicon by a multiple oxide insulation layer. An additional word line for each row of memory cells provides differentiation between adjacent memory cells sharing a single bit line.

REFERENCES:
patent: 4128773 (1978-12-01), Troutman

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