Static random access memory including a simplified memory cell c

Details Static random access memory including a simplified memory cell c Static random access memory including a simplified memory cell c

1992-09-11

1994-01-04

LaRoche, Eugene R.

Static information storage and retrieval

Powering

Conservation of power

365226, G11C 1134

Patent

active

052766527

ABSTRACT:
A static random access memory includes a plurality of memory cells each constituted by 5 elements. One memory cell is connected to a single bit line through a single access gate transistor. Additionally, a source line potential controlling circuit is provided for applying a predetermined intermediate potential to the source of a driver transistor of the memory cell in a column which is not accessed, when the memory cell is not accessed. Since one memory cell is constituted by only five elements, and connected to a single bit line, its density is improved. Furthermore, since a power supply voltage applied to the memory cell provided in the column which is not accessed is decreased by an effect of a source line potential controlling circuit, power consumption is decreased, and moreover, destruction of the memory cell can be prevented.

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"New Bit Line Architecture for Ultra High Speed SRAMS", Shiomi et al., IEEE 1991, pp. 10.4.1-10.4.4.
"THAM 9.4:16K CMOS/SOS Asynchronous Static RAM", 1979 IEEE International Solid-State Circuits Conference, pp. 104-105, 286.

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