Static random access memory having tunable-self-timed control lo

Details Static random access memory having tunable-self-timed control lo Static random access memory having tunable-self-timed control lo

1994-07-01

1996-08-13

Nelms, David C.

Static information storage and retrieval

Addressing

Sync/clocking

3652335, 365194, G11C 700

Patent

active

055463541

ABSTRACT:
A self-timed logic device which produces internal control and timing signals in response to an external signal is described. The circuit includes means responsive to a pulse signal for providing control and timing signals and means responsive to a change in state of a signal fed to said device for providing said pulse signal. The means for providing said pulse further includes means for selectively changing timing characteristics of said device in response to external tuning signals fed to the device. In a preferred embodiment the logic device is a static random access memory.

REFERENCES:
patent: 5327394 (1994-07-01), Green et al.
patent: 5402389 (1995-03-01), Flannagan et al.

Affiliated with

Also associated with

Rating

Static random access memory having tunable-self-timed control lo does not yet have a rating. At this time, there are no reviews or comments for this patent.

If you have personal experience with Static random access memory having tunable-self-timed control lo, we encourage you to share that experience with our LandOfFree.com community. Your opinion is very important and Static random access memory having tunable-self-timed control lo will most certainly appreciate the feedback.

Rate now

Comments { 0 }

Profile ID: LFUS-PAI-O-1054409