Static random access memory device with power down function

Details Static random access memory device with power down function Static random access memory device with power down function

1990-02-21

1990-10-09

Moffitt, James W.

Static information storage and retrieval

Addressing

Sync/clocking

36518911, 365195, G11C 700

Patent

active

049624873

ABSTRACT:
A static random access memory device is comprised of a write mode detector for detecting a signal state transition of a write enable signal changing to an active state, an input data transition detector for detecting a transition of the input data supplied from exterior, during a continuation of the active state of the write enable signal, an address signal transition detector for detecting a transition of an externally applied address signal during an active state of the write enable signal, a power down timer for generating a pulse signal with a predetermined pulse width in response to any of the detecting signals outputted from the write mode detector, input data transition detector, and address signal transition detector, a gate circuit for permitting the output data from a row decoder to be transferred to memory cells during a period that the power down timer generates a pulse signal, and for inhibiting that data transfer during a period that the power down timer rests, and a write circuit control circuit allowing a write circuit to supply write data to the bit line pair during a period that the power down timer generates a pulse signal, and prohibiting that write data transfer during a period that the power timer rests.

REFERENCES:
patent: 4564925 (1986-01-01), Onishi et al.
patent: 4636991 (1987-01-01), Flannagan et al.
patent: 4740718 (1988-04-01), Matsui
patent: 4813022 (1989-03-01), Matsui et al.
patent: 4815040 (1989-03-01), Matsui et al.
IEEE International Solid-State Circuits Conference, Feb. 23, 1984, pp. 214-215 , Copy M, 365-233.5.
IEEE Journal of Solid-State circuits, vol. SC-22, No. 5, Oct. 1987, pp. 741-747, entitled: A 40-ns/100-pF Low-Power Full-CMOS 256K (32K.times.8) SRAM.

Affiliated with

Also associated with

Rating

Static random access memory device with power down function does not yet have a rating. At this time, there are no reviews or comments for this patent.

If you have personal experience with Static random access memory device with power down function, we encourage you to share that experience with our LandOfFree.com community. Your opinion is very important and Static random access memory device with power down function will most certainly appreciate the feedback.

Rate now

Comments { 0 }

Profile ID: LFUS-PAI-O-977196