Static random access memory device with low power dissipation

Static information storage and retrieval – Powering – Conservation of power

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Details

365195, 365226, 3652335, G11C 1300

Patent

active

056469020

ABSTRACT:
A static random access memory device having a power-down timer for generating a power-down signal in response to a plurality of address transition detecting signals and data input detecting signals, a chip selection detecting signal and a write mode detecting signal, is disclosed. The device includes a power-up detector for generating a power-up signal to make the power-down detecting signal be conducted, the power-up detecting signal responding to a rising of a power supply voltage.

REFERENCES:
patent: 4947379 (1990-08-01), Okuyama
patent: 4962487 (1990-10-01), Suzuki
patent: 5329491 (1994-07-01), Brown et al.
patent: 5363335 (1994-11-01), Jungroth et al.
patent: 5406064 (1995-04-01), Takahashi
patent: 5420528 (1995-05-01), Shigehara

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