Static information storage and retrieval – Powering – Data preservation
Reexamination Certificate
2007-08-07
2007-08-07
Nguyen, VanThu (Department: 2824)
Static information storage and retrieval
Powering
Data preservation
C365S154000, C365S189090, C365S228000
Reexamination Certificate
active
11219827
ABSTRACT:
A semiconductor storage device includes first and second additional FETs disposed in parallel on one of potential lines for supplying first and second drive potentials to each SRAM memory cell. The gate terminal of the first additional FET is supplied with a selection signal through a selection signal supply line to turn on the first additional FET, when the memory cell is selected. The gate terminal of the second additional FET is supplied with a bias potential through a bias supply line, wherein the bias potential has first and second levels respectively corresponding to non-selection and selection of the memory cell.
REFERENCES:
patent: 5726562 (1998-03-01), Mizuno
patent: 6999338 (2006-02-01), Hirabayashi
patent: 7061820 (2006-06-01), Deng
Masanao Yamaoka, et al., “A 300MHz 25 μA/Mb Leakage On-Chip SRAM Module Featuring Process-Variation Immunity and Low-Leakage-Active Mode for Mobile-Phone Application Processor”, 2004 IEEE International Solid-State Circuits Conference.
U.S. Appl. No. 11/401,933 filed Apr. 12, 2006, Hirabayashi.
Kabushiki Kaisha Toshiba
Nguyen Van-Thu
Oblon & Spivak, McClelland, Maier & Neustadt P.C.
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