Static random access memory cell having buried sidewall capacito

Details Static random access memory cell having buried sidewall capacito Static random access memory cell having buried sidewall capacito

1997-03-24

2000-10-10

Jackson, Jr., Jerome

Active solid-state devices (e.g., transistors, solid-state diode

Integrated circuit structure with electrically isolated...

Passive components in ics

257532, 257903, 257904, H01L 2711

Patent

active

061304700

ABSTRACT:
A static random access memory (SRAM) cell having increased cell capacitance at the storage nodes utilizes a capacitive structure disposed in a trench. The capacitive structure includes an oxide liner disposed underneath two polysilicon plates. The polysilicon plates are each connected to drains of lateral transistors associated with the SRAM cell. The capacitive plates are deposited as a conformal layer polysilicon and then anisotropically etched to form plates on the side walls of the trench. A dielectric material such as silicon dioxide may be deposited between the polysilicon plates in the trench. The capacitor structures are provided between first and second N-channel pull down transistors associated with the SRAM cell.

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