Static PLA or ROM circuit with self-generated precharge

Electrical transmission or interconnection systems – Nonlinear reactor systems – Parametrons

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307443, 307452, 307453, 307269, 307468, 365233, H03K 19017

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active

047288272

ABSTRACT:
A static PLA circuit includes a logic gate portion, a precharge circuit portion and a feedback circuit portion. The feedback circuit portion is connected between the output of the logic gate portion and the input of the precharge circuit portion. The feedback circuit portion functions to delay the turn-on time of the precharge circuit portion when the output of the logic gate portion is making a high-to-low transition, thereby increasing the speed of the output transition.

REFERENCES:
patent: 4365316 (1982-12-01), Iwahashi et al.
patent: 4398102 (1983-08-01), Stewart
patent: 4553045 (1985-11-01), Murotani
patent: 4563598 (1986-01-01), Oritani
patent: 4570084 (1986-02-01), Griffin et al.
patent: 4645952 (1987-02-01), van Tran
Grice et al., "Exclusive OR PLA and Array", IBM T.D.B., vol. 23, No. 7B, 12-1980, pp. 3270-3271.
Bilger et al. "Single-Ended Unlocked CMOS Logic", IBM T.D.B., vol. 27, No. 10B, 3-1985, pp. 6012-6013.
Delahanty et al., "PLA Driver with Integral Race Prevention", IBM T.D.B., vol. 19, No. 1, 6-1976, pp. 152-153.

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