Static method to negate offset voltages in CMOS operational ampl

Details Static method to negate offset voltages in CMOS operational ampl Static method to negate offset voltages in CMOS operational ampl

1988-10-31

1990-08-14

Miller, Stanley D.

Electrical transmission or interconnection systems

Nonlinear reactor systems

Parametrons

307493, 307494, 307520, 328162, 328165, G06G 712, H03K 500

Patent

active

049489925

ABSTRACT:
Disclosed is a generator and method for using the generator to negate offset voltages in operational amplifiers. The generator includes an operational amplifier (op amp) whose input stage includes a current source coupled to a differential pair of input devices. The physical characteristics of the devices are such that an intentional offset voltage greater than the normal op amp offset voltage is provided in the input stage. The output terminal of the generator op amp is connected to the substrate terminal of one of the input devices. The offset voltages of other op amps can be negated by interconnecting the substrate terminal of one device in each input differential pair to the output terminal of the generator op amp and creating an intentional offset voltage in the input differential pair of each op amp.

REFERENCES:
patent: 3050673 (1962-08-01), Widmer
patent: 4365204 (1982-12-01), Hague
patent: 4439693 (1984-03-01), Lucas et al.
patent: 4560890 (1985-12-01), Masuda et al.
patent: 4604584 (1986-08-01), Kelley
patent: 4769612 (1988-09-01), Tamakoshi et al.
R. Poujois et al., "Low-Level MOS Transistor Amplifier Using Storage Techniques", IEEE International Solid-State Circuits Conference, Feb. 1973, pp. 152-153 and 216-217.
Gray et al., "MOS Operational Amplifier Design--A Tutorial Overview", IEEE Journal of Solid State Circuits, vol. SC-17, No. 6, Dec. 1982, pp. 969-982.
McGeary et al., "All--MOS Charge Redistribution Analog-to-Digital Conversion Techniques--Part 1", IEEE Journal of Solid State Circuits, vol. SC-10, No. 6, Dec. 1975, pp. 371-379.
Schade, Jr., "BiMOS Micropower IC's", IEEE Journal of Solid State Circuits, vol. SC-13, No. 6, Dec. 1978, pp. 791-798.
Schade, Jr., "A Low-Voltage BiMOS Op Amp", IEEE Journal of Solid State Circuits, vol. SC-16, No. 6, Dec. 1981, pp. 661-668.

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