Static memory cell using a heterostructure complementary transis

Details Static memory cell using a heterostructure complementary transis Static memory cell using a heterostructure complementary transis

1987-09-14

1989-02-21

James, Andrew J.

357 16, 357 44, 357 38, H01L 2972

Patent

active

048070084

ABSTRACT:
A heterostructure complementary transistor switch (HCTS) is fabricated using epitaxial layers on a substrate to form the desired P-N-P-N (or N-P-N-P) complementary structure in III-V compound semiconductor materials. Two HCTS are formed on a single substrate to form a memory cell. A collector and a base on one of the HCTs are connected to a base and a collector, respectively, on the other HCTS to form the memory cell.

REFERENCES:
patent: 4388633 (1983-06-01), Vasudev
patent: 4649411 (1987-03-01), Birrittella
IBM Technical Disclosure Bulletin, vol. 15, #2, p. 470 by Blum, Jul. 1972.
IBM Journal Research Development, vol. 25, #3, pp. 126-134 by Dorler et al., May 1981.
Journal of Applied Physics Letters vol. 50, #6, pp. 338-340 by Taylor.

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