Patent
1987-01-28
1989-03-07
Larkins, William D.
357 41, 357 43, 357 46, 357 92, H01L 2704, H01L 2980, H03K 19091
Patent
active
048110647
ABSTRACT:
A static induction transistor (SIT) which is made to operate with a forward gate bias by maintaining the width of the channel region at an appropriate value. Such an improved SIT is used as the inverter transistor in a merged transistor logic (MTL) semiconductor IC (integrated circuit) to reduce the time delay-power product by an order or more. The collector region of a bipolar load transistor is continuous to or also serves as the gate region of the inverter SIT. A plurality of channel regions are formed penetrating through this collection/gate region. This SIT is simple in structure, which enables a marked increase in the integration density.
REFERENCES:
patent: 4259681 (1981-03-01), Nishizawa
Nishizawa et al, "Bipolar Mode Static Induction Transistors", Proc. 11th Conf. (1979) on Solid State Devices (Tokyo), Japan J. Applied Physics, vol. 19 (1980), Suppl. 19-1, pp. 289-293.
Nishizawa Jun-ichi
Wilamowski Bogdan M.
Larkins William D.
Zaidan Hojin Handotai Kenkyu Shinkokai
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