1992-11-23
1995-01-03
Beausoliel, Jr., Robert W.
Excavating
371 211, G06F 1134, G11C 2900
Patent
active
053794168
ABSTRACT:
A state tracer system comprising a counter for counting the time taken until, upon receipt of a first request signal from a storage unit, an error takes place; an A-register within which the count number A of this counter is set and its state is held; an X-register which allows the time taken to reach the necessary data to be arbitrarily set; an A-subtracting circuit for subtracting the count number A held by the A-register and the count number X held by the X-register to emit (A - X); a comparator for comparing the output value (A - X) of the A-subtracting circuit and the outpost value of the counter; and means for entering the output (A - X) from the comparator to a stop condition circuit of the tracer memory as a stop signal so that, by setting the count number X of the X-register to several tens to hundreds of micorseconds. Therefore, it is possible to collect the trace data traced back to several tens to hundreds of microseconds before the time the error takes place and the stop condition is met, without increasing the storage capacity of the RAM of the tracer memory.
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patent: 5146586 (1992-09-01), Nakano
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Beausoliel, Jr. Robert W.
Le Dieu-Minh
NEC Corporation
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