State machine architecture providing increased resolution of out

Details State machine architecture providing increased resolution of out State machine architecture providing increased resolution of out

1991-04-02

1992-10-27

Callahan, Timothy P.

Electrical transmission or interconnection systems

Nonlinear reactor systems

Parametrons

328 72, 328137, 328104, 307465, 307269, H03K 301, H03K 1700

Patent

active

051592789

ABSTRACT:
A circuit allows for improved flexibility in the timing of device output, for example, from a state machine. Output for the device is placed in a first register. The output is forwarded from the first register to a second register. The first register and the second register are clocked on different edges of a clock signal. A selector selects contents of the first register or contents of the second register as the device output for an external device. The selector may be controlled by the contents of one or more flip-flops. When the device is a state machine, the output of each flip-flop may also be used as feedback to the state machine.

REFERENCES:
patent: 4644568 (1987-02-01), Canniff et al.
patent: 4879481 (1989-11-01), Pathak et al.
patent: 4942318 (1990-07-01), Kawana
patent: 4970410 (1990-11-01), Matsushita et al.

Affiliated with

Also associated with

Rating

State machine architecture providing increased resolution of out does not yet have a rating. At this time, there are no reviews or comments for this patent.

If you have personal experience with State machine architecture providing increased resolution of out, we encourage you to share that experience with our LandOfFree.com community. Your opinion is very important and State machine architecture providing increased resolution of out will most certainly appreciate the feedback.

Rate now

Comments { 0 }

Profile ID: LFUS-PAI-O-907885