State-dependent discharge path circuit

Details State-dependent discharge path circuit State-dependent discharge path circuit

1991-12-06

1993-02-02

Westin, Edward P.

Electrical transmission or interconnection systems

Nonlinear reactor systems

Parametrons

307446, 307570, 307300, H03K 19013, H03K 190952

Patent

active

051840340

ABSTRACT:
A circuit for use in connection with tristate output buffers in order to provide concurrently for fast discharge of the output pulldown transistor base and at the same time for building in protection against reverse breakdown in the pulldown transistor. The innovation consists of providing a two discharge paths to ground for the base of the output pullup transistor. A low-capacitance path is activated only while the output buffer is in its active mode. In the preferred embodiment of the invention, this low discharge path consists of two CMOS transistors in series, one of which is controlled by the enable signal input E of the buffer circuit and the other by the data signal input V.sub.IN of the buffer circuit. The other path to ground is available whenever the data signal input V.sub.IN is low, regardless of whether the buffer is in its active or inactive mode. This other path provides discharge protection for the base of the pullup transistor for the buffer in its inactive mode, and has incorporated into it reverse breakdown protection in the form of voltage drop devices such as forward-biased diodes.

REFERENCES:
patent: 4678943 (1987-07-01), Uragami et al.
patent: 4999519 (1991-03-01), Kitsukawa et al.
patent: 5047669 (1991-09-01), Iwamura et al.
patent: 5059824 (1991-10-01), Ueno
patent: 5107143 (1992-04-01), Veno et al.

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