Start-up circuit

Details Start-up circuit Start-up circuit

1994-07-27

2000-05-09

Zweizig, Jeffrey

Miscellaneous active electrical nonlinear devices, circuits, and

Signal converting, shaping, or generating

Synchronizing

327537, G05F 110

Patent

active

060609184

ABSTRACT:
There is disclosed a start-up circuit (3a) wherein a plurality of NMOSs (Q8 to Q10) are connected in series between the drain of a PMOS (Q1) and a ground potential point (2) and connected at their gate to a power-supply potential point (1), and wherein a voltage drop at the NMOSs (Q8 to Q10) generates a gate potential of a PMOS (Q2) for supplying current to a bias supply circuit (4). By using the voltage drop of the NMOSs (Q8 to Q10) having a small area, the start-up circuit including a CMOS is reduced in layout area.

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patent: 4504743 (1985-03-01), Aoyama et al.
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patent: 5034626 (1991-07-01), Pirez et al.
patent: 5180967 (1993-01-01), Yamazaki
patent: 5243231 (1993-09-01), Baik
patent: 5293112 (1994-03-01), Takahashi
patent: 5296765 (1994-03-01), Willams et al.
Gray & Meyer, Analysis and Design of Analog Integrated Circuits, John Wiley & Sons, Inc New York 1993.
Sedra & Smith, `Microelectronic Circuits`, Saunders College Publishing 1991, pp. 308 & A4.

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