Standard semiconductor cell with contoured cell boundary to incr

Details Standard semiconductor cell with contoured cell boundary to incr Standard semiconductor cell with contoured cell boundary to incr

1997-03-17

1998-08-25

Thomas, Tom

Active solid-state devices (e.g., transistors, solid-state diode

Gate arrays

257206, 257207, 257211, H01L 2702

Patent

active

057985413

ABSTRACT:
A layout arrangement which provides a contouring of cells that allows the individual rectangular cell boundaries to overlap each other to a point at which individual device edges abut one another thereby utilizing die area which is normally lost to use. In order to attain this result, a new cell contour boundary is described about each cell at the edge of each individual device adjacent the exterior of the cell at a distance at which other cells may abut without disturbing the operation of the cell. Then, computer implemented processes are applied to cause the cells to fit abutting the newly described boundaries.

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