Staggered compare architecture for content addressable...

Details Staggered compare architecture for content addressable... Staggered compare architecture for content addressable...

2005-10-25

2005-10-25

Tran, Andrew Q. (Department: 2824)

Static information storage and retrieval

Associative memories

Ferroelectric cell

C365S189070, C365S230030, C365S203000, C365S233100, C365S168000, C365S227000

Reexamination Certificate

active

06958925

ABSTRACT:
A content addressable memory (CAM) device (300) can receive a compare data value having a native word size. The compare data value can be split into smaller portions, with one portion can be applied to a first CAM block (302-0) and another being applied to a second CAM block (302-1) on a subsequent clock (CAMCLK) cycle. Activation of circuit elements in the second CAM block (302-1) can be conditioned on first match results (CMATCHA0to CMATCHAn) generated by first CAM block (302-0).

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