Multiplex communications – Pathfinding or routing – Through a circuit switch
Reexamination Certificate
1999-03-19
2002-03-26
Nguyen, Chau T. (Department: 2663)
Multiplex communications
Pathfinding or routing
Through a circuit switch
C370S408000, C370S402000
Reexamination Certificate
active
06363067
ABSTRACT:
FIELD OF THE INVENTION
The invention relates to a multi-port bridge for a local area network. More particularly, the invention relates to a staged partitioned communication bus for interconnecting the ports of a multi-port bridge for a local area network.
BACKGROUND OF THE INVENTION
Nodes of a local area network (LAN) are typically interconnected by a shared transmission medium. The amount of data traffic that the shared transmission medium can accommodate, however, is limited. For example, only one node at a time can successfully transmit data to another node over the shared transmission medium. If two or more nodes simultaneously attempt to transmit data, a data collision occurs, which tends to corrupt the data being transmitted. Thus, nodes that share a transmission medium are considered to be in a same collision domain.
A multi-port bridge allows simultaneous communication between nodes of the LAN by segmenting the LAN into multiple collision domains (also referred to as network segments or LAN segments), each segment having a corresponding transmission medium.
FIG. 1
illustrates a conventional local area network including a multi-port bridge
10
. The multi-port bridge
10
has eight ports A-H, though the number of ports can vary. Each port A-H is connected to a segment
11
-
18
of the LAN. Each segment
11
-
18
typically includes one or more nodes
19
-
34
, such as a workstation a personal computer, a data terminal, a file server, a printer, a facsimile, a scanner or other conventional digital device. Each of the nodes
19
-
34
has an associated node address (also referred to as a medium access control (MAC) address) which uniquely identifies the node. The nodes
19
-
34
are configured to send data, one to another, in the form of discrete data packets.
When the LAN operates according to Ethernet standards, such as the Institute of Electrical and Electronics Engineers (IEEE) 802.3 standard, data is communicated in the form of discrete packets.
FIG. 2
illustrates a conventional IEEE 802.3 data packet
40
. The data packet
40
includes an eight byte long pre-amble
41
which is generally utilized for synchronizing a receiver to the data packet
40
. The pre-amble
41
includes seven bytes of pre-amble and one byte of start-of-frame. Following the pre-amble
41
, the data packet
40
includes a six-byte-long destination address
42
, which is the node address of a node which is an intended recipient for the data packet
40
. Next, the data packet
40
includes a six-byte-long source address
43
, which is the node address of a node which originated the data packet
40
. Following the source address
43
is a two-byte length field
44
. Following the length field
44
is a data field
45
. The data field
45
can be up to 1500 bytes long. Finally, the data packet
40
includes a two-byte frame check field
46
which allows a recipient of the data packet
40
to determine whether an error has occurred during transmission of the data packet
40
.
When a node (source node) sends data to another node (destination node) located on its same segment of the LAN (intra-segment communication), the data is communicated directly between the nodes without intervention by the multi-port bridge
10
and is known as an intra-segment packet. Therefore, when the multi-port bridge
10
receives an intra-segment packet, the multi-port bridge
10
does not bridge the packet (the packet is filtered). When a node (source node) sends a data packet to another node (destination node) located on a different segment (inter-segment communication), the multi-port bridge
10
appropriately forwards the data packet to the destination node.
Problems can arise, however, when the capabilities of the multi-port bridge
10
are exceeded by network demand. When data packets
40
are received by the multi-port bridge
10
at a rate that is higher than the rate at which the multi-port bridge
10
can appropriately forward each packet
40
, the multi-port bridge
10
becomes a source of network congestion. This problem is exacerbated as network users place increasing demands On the network.
Therefore, what is needed is improved technique for increasing the data packet handling capacity in a multi-port bridge for a local area network.
SUMMARY OF THE INVENTION
The invention is a staged partitioned communication bus for interconnecting the ports of a multi-port bridge for a local area network. The communication bus is partitioned into a plurality of data bus segments. Each data bus segment is coupled to one or more ports of the multi-port bridge and includes a same number (n) of signal lines. A staging multiplexer is coupled to each data bus segment and to a memory device. A bus controller is coupled to each port and to the multiplexer. Each port requests access to the memory device from the bus controller for storing data packets in the memory device and for retrieving data packets therefrom. In response to such requests, the bus controller conditions the multiplexer to provide a signal path between the memory device and the data bus segment which includes the requesting port.
The memory device is utilized for temporarily storing data packets undergoing communication between the ports. Accordingly, a source port for a data packet transfers the data packet to the memory device via the multiplexer and, then, a destination port for the data packet retrieves the data packet from the memory device via the multiplexer. If the source port and the destination port are on a same data bus segment and the destination port is not currently busy, the destination port preferably receives the data packet directly from the source port simultaneously as the source port stores the data packet in the memory device.
A look-up bus included in the multi-port bridge, which is operable independently of the staged partitioned bus, is preferably coupled to each port of the multi-port bridge and to a look-up table. The look-up table correlates destination addresses for data packets to identifications of destination ports. When a packet is received by a port of the multi-port bridge, the destination port for the packet is identified by communicating a destination address for the data packet to the look-up table via the look-up bus. The destination port for the packet is notified of its status as a destination port for the packet via the look-up bus.
Because each bus segment is coupled to fewer than all of the ports, the signal lines of each bus segment can be physically shorter in length and less heavily loaded than if coupled to all of the ports. Accordingly, the transparently partitioned bus can transfer data in accordance with a significantly higher frequency clock signal than would otherwise be the case.
In accordance with an embodiment of the present invention, an apparatus having a staged partitioned bus for transferring data includes: a first bus segment having a first plurality of (n) signal lines; a second bus segment having a second plurality of (n) signal lines; multiplexer means coupled to the first bus segment and to the second bus segment; and memory means coupled to the multiplexer means for temporarily storing data undergoing communication between the first bus segment and the second bus segment
In accordance with another embodiment of the present invention, a multi-port bridge having a staged partitioned bus for transferring data between ports of the multi-port bridge includes: a first data bus segment having a first plurality of (n) signal lines; a first port coupled to the first data bus segment; a second data bus segment having a second plurality of (n) signal lines; a second port coupled to the second data bus segment; a multiplexer having a first input coupled to the first data bus segment, a second input coupled to the second data bus segment and an output; and a memory device coupled to the output of the multiplexer whereby data is selectively communicated between the first port and the memory device and between the second port and the memory device according to a condition of the multiplexer.
In accordance with
Haverstock & Owens LLP
Nguyen Chau T.
Sony Corporation
Trinh D.
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