Stacked V-cell capacitor

Fishing – trapping – and vermin destroying

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437 52, H01L 2770, H01L 21265

Patent

active

052197786

ABSTRACT:
A stacked v-cell (SVC) capacitor using a modified stacked capacitor storage cell fabrication process. The SVC capacitor is made up of polysilicon structure, having a v-shaped cross-section, located at a buried contact and extending to an adjacent storage node overlaid by polysilicon with a dielectric sandwiched in between. The addition of the polysilicon structure increases storage capability 70% without enlarging the surface area defined for a normal stacked capacitor cell.

REFERENCES:
patent: 4742018 (1988-05-01), Kimura et al.
patent: 4981810 (1991-01-01), Fazan et al.
patent: 5120674 (1992-06-01), Chin et al.
patent: 5128273 (1992-07-01), Ema
"3-Dimensional Stacked Capacitor Cell for 16M and 64M DRAMS" by T. Ema et al., IEDM 88, pp. 592-595 (unknown date).
"A Spread Stacked Capacitor (SCC) for 64Mbit DRAMS" by S. Inoue et al., IEEE 89, pp. 2.3.1-2.3.4. (unknown date).

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