Stacked structure of integrated circuits

Active solid-state devices (e.g. – transistors – solid-state diode – Combined with electrical contact or lead – Chip mounted on chip

Reexamination Certificate

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Details

C257S778000, C257S782000, C257S784000, C257S786000

Reexamination Certificate

active

07015586

ABSTRACT:
A stacked structure of integrated circuits includes a substrate, a lower integrated circuit, a space layer, an upper integrated circuit, and a compound resin. The substrate has an upper surface on which a plurality of signal input terminals are formed at one side of the upper surface, and a lower surface. The lower integrated circuit has a plurality of bonding pads formed at the central region of the lower integrated circuit, which is mounted to the upper surface of the substrate and being electrically connected to the plurality of signal input terminals via a plurality of wires, so that at one side of the lower integrated circuit is formed with a space region without wires. The space layer is arranged on the space region of the lower integrated circuit. The upper integrated circuit is mounted to the space layer and electrically connected to the signal input terminals via a plurality of wires. The compound resin is located above the upper surface of the substrate for encapsulating the upper integrated circuit, lower integrated circuit, and the plurality of wires.

REFERENCES:
patent: 6621155 (2003-09-01), Perino et al.
patent: 6900528 (2005-05-01), Mess et al.

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