Stacked semiconductor package electrically connecting...

Active solid-state devices (e.g. – transistors – solid-state diode – Housing or package – Multiple housings

Reexamination Certificate

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C257S777000, C257S723000, C257S738000, C257S773000

Reexamination Certificate

active

07838979

ABSTRACT:
A stacked semiconductor package and a method for manufacturing the same. The stacked semiconductor package includes a semiconductor chip module having two or more semiconductor chips which are stacked in the shape of steps. Each of the semiconductor chips includes pads located on an upper surface thereof and an inclined side surface connected with the upper surface. Connection patterns are formed in the shape of lines on the inclined side surfaces and the upper surfaces of the semiconductor chips to electrically connect pads of the semiconductor chips.

REFERENCES:
patent: 5093708 (1992-03-01), Solomon
patent: 2008/0083976 (2008-04-01), Haba et al.
patent: 2008/0083977 (2008-04-01), Haba et al.
patent: 2009/0026600 (2009-01-01), Koon et al.
patent: 2009/0039528 (2009-02-01), Haba et al.

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