Active solid-state devices (e.g. – transistors – solid-state diode – Housing or package – Multiple housings
Reexamination Certificate
2002-12-30
2004-08-10
Vu, Hung (Department: 2811)
Active solid-state devices (e.g., transistors, solid-state diode
Housing or package
Multiple housings
C257S687000, C257S698000, C257S700000, C257S707000
Reexamination Certificate
active
06774478
ABSTRACT:
CROSS REFERENCE TO RELATED APPLICATION
This application is based upon and claims the benefit of priority from the prior Japanese Patent Application No. 2002-000069 filed on Jan. 4, 2002, the entire contents of which are incorporated herein by reference.
BACKGROUND OF THE INVENTION
1. Field of the Invention
The present invention relates to a heat radiation structure of a semiconductor package having a structure in which a plurality of semiconductor chips are stacked.
2. Description of the Related Art
Semiconductor apparatuses have come to be used in a state where semiconductor chips are stacked in order to increase packaging densities, in many cases. Conventional stacked packages are described in Japanese Patent Publications H9-219490 (published in 1997), H10-135267 (published in 1998), and H10-163414 (published in 1998). In these conventional packages, packages, such as thin small outline packages (TSOPs), tape carrier packages (TCPs), or ball grid arrays (BGAs), are assembled completely, and then the packages, which each have external terminals provided on the packages in advance individually stacked upon one another, are stacked. Furthermore, the packages are electrically connected.
Meanwhile, as described in Japanese Patent Publication H11-239033 (published in 1999), a stacked semiconductor package which is thin, excellent in sealing performance and elasticity, and capable of being easily formed by a relatively simple manufacturing process, has also been proposed. The semiconductor package is called a system block module (abbreviated as an SMB), and is formed by stacking a plurality of paper thin packages (PTPs) employing thin silicon substrates.
A conventional SMB-type semiconductor package has a stacked structure made by stacking a plurality of units. Each unit includes a semiconductor chip, a circuit board having the semiconductor chip mounted thereon, and a frame-shaped insulating substrate which has a chip cavity and which is mounted on the circuit board. The stacked structure in which the plurality of units are stacked is sandwiched by two insulating substrates, and then the resultant structure is made monolithic, thus forming the SMB-type semiconductor package. A required number of external connection terminals made of solder balls or the like are formed on an outer surface of one insulating substrate. The external terminals are electrically connected to electrodes of the semiconductor chips, respectively, through electrically conductive vias formed in the insulating substrates.
Adoption of such a stacked semiconductor package realizes a smaller semiconductor apparatus with higher density. However, since a smaller semiconductor apparatus has a structure with such high density integration of semiconductor chips, heat is more apt to be generated.
A high temperature of a semiconductor chip harmfully affects operations and reliability of the semiconductor device. Particularly in a semiconductor memory such as a dynamic random access read write memory (DRAM), a high temperature causes deterioration in memory retention characteristics. Accordingly, in stacked semiconductor packages, heat radiation measures are required.
SUMMARY OF THE INVENTION
A semiconductor package of an aspect of the present invention includes (1) a first insulating substrate, which has wiring placed on one surface thereof and which has a plurality of first electrically conductive balls that are used as external connection terminals and a plurality of second electrically conductive balls that radiate heat, the first and second electrically conductive balls are placed on the other surface thereof; (2) a second insulating substrate placed opposite to the one surface of the first insulating substrate; and (3) a plurality of semiconductor chip units placed between the first and second insulating substrates. Each semiconductor chip unit has a semiconductor chip; a circuit board on which the semiconductor chip is mounted and which is provided with wiring electrically connected to terminals of the semiconductor chip; and a third insulating substrate which is placed on the circuit board and which has a chip cavity for housing the semiconductor chip.
A semiconductor apparatus of an aspect of the present invention includes the semiconductor package of the above-described aspect; and a mount board on which the semiconductor package is mounted and which has a plurality of wiring layers and heat conducting paths for connecting any one of the plurality of wiring layers to the second electrically conductive balls of the semiconductor package. Here, the heat conducting paths are formed in the mount board.
REFERENCES:
patent: 5579207 (1996-11-01), Hayden et al.
patent: 6493229 (2002-12-01), Akram et al.
patent: 6525942 (2003-02-01), Huang et al.
patent: 09-219490 (1997-08-01), None
patent: 09-237853 (1997-09-01), None
patent: 09-326450 (1997-12-01), None
patent: 10-135267 (1998-05-01), None
patent: 10-163414 (1998-06-01), None
patent: 11-163229 (1999-06-01), None
patent: 11-239033 (1999-08-01), None
Eto Junya
Hayashi Kiyotaka
Hogan & Hartson LLP
Kabushiki Kaisha Toshiba
Vu Hung
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