Stacked semiconductor package

Details Stacked semiconductor package Stacked semiconductor package

2011-08-09

2011-08-09

Richards, N Drew (Department: 2895)

Active solid-state devices (e.g., transistors, solid-state diode

Housing or package

Multiple housings

C438S107000, C438S109000, C438S406000, C438S455000, C438S617000

Reexamination Certificate

active

07994621

ABSTRACT:
A stacked semiconductor package provides an enhanced data storage capacity along with an improved data processing speed. The stacked semiconductor package includes a substrate having chip selection pads and a connection pad; a semiconductor chip module including a plurality of semiconductor chips including data bonding pads, a chip selection bonding pad, and data redistributions electrically connected with the data bonding pads and a data through electrode passing through the data bonding pad and connected with the data redistribution, the semiconductor chips being stacked so as to expose the chip selection bonding pad; and a conductive wire for connecting electrically the chip selection pad and the chip selection bonding pads.

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patent: 2007/079121 (2007-07-01), None

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