Stacked semiconductor module

Active solid-state devices (e.g. – transistors – solid-state diode – Housing or package – Multiple housings

Reexamination Certificate

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C257S777000, C257S723000

Reexamination Certificate

active

06720643

ABSTRACT:

TECHNICAL FIELD
The present invention relates to semiconductor modules and in particular to multi-chip or stacked integrated circuit (IC) die modules having separately addressable IC dies.
BACKGROUND OF THE INVENTION
The semiconductor industry is constantly producing smaller and more complex semiconductors, sometimes called integrated circuits (ICs) or chips. This trend has brought about the need for smaller semiconductor packages with smaller footprints, higher lead counts, and better electrical and thermal performance, while at the same time meeting accepted reliability standards.
As memory demands increase, so does the need for increased memory capacity. A problem with adding more ICs to a circuit board for increased memory capacity, is that placement of the ICs on the circuit board is spread out, which often requires reconfiguration of the circuit board connectors and their associated connections on a motherboard. This ultimately leads to replacing the circuit board and in some cases the entire motherboard.
One solution to adding more memory capacity without spreading out ICs on a circuit board is by using a 3-dimensional chip stacking technique to form multi-chip modules (MCMs), otherwise known as stacked semiconductor modules, or stacked IC modules. These MCMs have a high memory capacity, while retaining a relatively small size. Examples of these techniques are disclosed in U.S. Pat. Nos. 5,104,820, and 5,279,991, and U.S. patent application Ser. Nos. 09/471,304 and 09/685,941, all of which are incorporated herein by reference.
These prior art stacked semiconductor modules require all IC dies within the MCM to be in adequate working order after assembly. If any of the IC dies are found to be defective during or after the assembly process, the entire MCM is scrapped, as there is no means of utilizing only the working IC dies.
The manufacturing process of these MCMs is typically as follows. Each manufactured IC die is tested for desired characteristics, such as speed BIN, operating frequency, etc. The IC dies are then sorted based on their measured characteristics. For example, all 600 MHz dies are collected together, all 700 MHz dies are collected together, and all 800 MHz dies are collected together. The IC dies from a single sorted group are then assembled into stacks and packaged together to form a stacked semiconductor module or MCM. For example, multiple 800 MHz IC dies are packaged together to form an In-line memory module, such as a RAMBUS PC800 RDRAM™ RIMM™ (a RDRAM™ is a RAMBUS Dynamic Random Access Memory, and a RIMM™ is a RAMBUS In-line Memory Module).
The problem with the above process for forming MCMs, is that if during or after assembly it is found that one of the IC dies is not operating or does not have the required characteristics, for instance because an IC die was damaged during assembly, that MCM is scrapped. The cost of scrapping modules can be significant. Furthermore, if only one IC die is found to be unacceptable, the whole MCM is scrapped, including the IC dies within the MCM that were found to be acceptable. This leads to a wastage of potentially valuable IC dies. Moreover, the cost of scrapping MCMs prohibits the manufacture of MCMs having many stacks of IC dies, because if one IC die in a single stack is found to be unacceptable, the whole MCM is scrapped, wasting even more IC dies.
In view of the foregoing it would be highly desirable to provide an MCM that overcomes the shortcomings of prior art devices by addressing the problem of having to scrap entire MCMs when one or more of the embedded IC dies are found to be unacceptable.
SUMMARY OF THE INVENTION
According to the invention there is provided a semiconductor module. The semiconductor module includes a semiconductor housing and a plurality of integrated circuit dies positioned within the housing. The semiconductor module also includes a programmable memory device positioned within the housing and electrically coupled to the plurality of integrated circuit dies. The programmable memory device is programmable to identify integrated circuit dies that meet a predetermined standard, such as an operating frequency requirement, or a core timing grade. These semiconductor modules supply a high memory capacity by stacking IC dies over a short distance of channel.
Further according to the invention there is provided a method of accessing a semiconductor module. The above housing is provided to enclose the plurality of integrated circuit dies and the programmable memory device. Selected integrated circuit dies of the plurality of integrated circuit dies that meet a predetermined standard, are then identified. The programmable memory device is subsequently programmed to identify the selected integrated circuit dies.
The programmable memory device thereby allows manufacturers to test all IC dies in a semiconductor module after assembly and store the number of working IC dies and their location in the programable memory device, such that a controller can use the semiconductor modules.
The IC dies within the semiconductor module also preferably share a number of contacts or ball-outs, thereby, reducing the footprint of the semiconductor module. Such common contacts may include common ground lines, power lines, reference lines, or the like.
Another embodiment includes a semiconductor module that straddles multiple channels, allowing for more efficient use of IC dies and having the added advantage of sharing a single heat spreader for more efficient heat dissipation.


REFERENCES:
patent: 5783870 (1998-07-01), Mostafazadeh et al.
patent: 6057598 (2000-05-01), Payne et al.
patent: 6215182 (2001-04-01), Ozawa et al.
patent: 6340845 (2002-01-01), Oda
patent: 6376904 (2002-04-01), Haba et al.
patent: 6452259 (2002-09-01), Akiyama

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