Stacked semiconductor chips

Details Stacked semiconductor chips Stacked semiconductor chips

2007-02-20

2007-02-20

Chambliss, Alonzo (Department: 2814)

Active solid-state devices (e.g., transistors, solid-state diode

Housing or package

Multiple housings

C257S776000, C257S777000, C257SE23019, C257SE23143, C257SE23151, C257SE23010

Reexamination Certificate

active

11222330

ABSTRACT:
A groove is formed on a semiconductor substrate having integrated circuits and electrodes from a first surface. An insulating layer is formed on an inner surface of the groove. A conductive layer is formed on the insulating layer above the inner surface of the groove. A second surface of the semiconductor substrate opposite to the first surface is ground until the groove is exposed to divide the semiconductor substrate into a plurality of semiconductor chips in which the conductive layer is exposed on a side surface of each semiconductor chip. The semiconductor chips are then stacked. The conductive layer of one of the semiconductor chips is electrically connected to the conductive layer of another one of the semiconductor chips.

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