Stacked package for integrated circuits

Details Stacked package for integrated circuits Stacked package for integrated circuits

2005-05-17

2005-05-17

Nguyen, Cuong (Department: 2811)

Semiconductor device manufacturing: process

Packaging or treatment of packaged semiconductor

Assembly of plural semiconductive substrates each possessing...

C438S106000, C438S110000

Reexamination Certificate

active

06893897

ABSTRACT:
A space-saving integrated circuit package employs two printed circuit boards joined together, the upper board having an integrated circuit attached by flip-chip technology and the lower board having a cavity for holding an integrated circuit that is located beneath the upper integrated circuit, the lower integrated circuit being bonded to the bottom of the upper board below the upper integrated circuit and electrically connected to wiring on the lower surface of the lower board by wire bond connections.

REFERENCES:
patent: 5763939 (1998-06-01), Yamashita
patent: 5899705 (1999-05-01), Akram
patent: 6166443 (2000-12-01), Inaba et al.
patent: 6201266 (2001-03-01), Ohuchi et al.
patent: 6339254 (2002-01-01), Venkateshwaran et al.
patent: 6340846 (2002-01-01), LoBianco et al.
patent: 6351194 (2002-02-01), Takahashi et al.

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