Stacked package and method for manufacturing the package

Active solid-state devices (e.g. – transistors – solid-state diode – Housing or package – With contact or lead

Reexamination Certificate

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C257S686000, C257SE23024

Reexamination Certificate

active

07928557

ABSTRACT:
In a stacked package in which a plurality of packages having semiconductor elements mounted on substrates are stacked, while being electrically connected together, by use of connection sections, wherein the connection sections are formed from pillar-like members and solder joint sections and the upper package is supported on the lower package by pillar-like members.

REFERENCES:
patent: 4970577 (1990-11-01), Ogihara et al.
patent: 5956233 (1999-09-01), Yew et al.
patent: 6195268 (2001-02-01), Eide
patent: 7358603 (2008-04-01), Li et al.
patent: 2004/0007774 (2004-01-01), Crane et al.
patent: 2006/0289977 (2006-12-01), Master et al.
patent: 2007/0235856 (2007-10-01), Haba et al.
patent: 11-8474 (1999-01-01), None

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