Stacked non-volatile memory device and method of making the...

Static information storage and retrieval – Interconnection arrangements

Reexamination Certificate

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Details

C365S051000, C365S072000, C361S760000

Reexamination Certificate

active

06853571

ABSTRACT:
Briefly, in accordance with one embodiment of the invention, a first integrated circuit having control circuitry is bonded to a second integrated circuit having a memory array. The control circuitry of the first integrated circuit being adapted to access, at least in part, data stored in the memory array of the second integrated circuit.

REFERENCES:
patent: 6337634 (2002-01-01), O'Toole et al.
patent: 6404648 (2002-06-01), Slupe et al.
patent: 6462976 (2002-10-01), Olejniczak et al.
patent: 20030143971 (2003-07-01), Hongo et al.
patent: 02000031377 (2000-01-01), None

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